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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jan 2023 11:05:27.4476 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 27e1c20b-ac45-480c-5c53-08daf3c3bf10 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT083.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8339 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Wayne Chang Pad tracking is a one-time calibration for Tegra186 and Tegra194. Clk should be disabled after calibration. Disable clk after calibration. While at it add 100us delay for HW recording the calibration value. Signed-off-by: Wayne Chang Signed-off-by: Jon Hunter --- V2 -> V6: no changes V1 -> V2: update the commit message drivers/phy/tegra/xusb-tegra186.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c index 6a8bd87cfdbd..c00d14f27ab4 100644 --- a/drivers/phy/tegra/xusb-tegra186.c +++ b/drivers/phy/tegra/xusb-tegra186.c @@ -609,6 +609,10 @@ static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl) value &= ~USB2_PD_TRK; padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); + udelay(100); + + clk_disable_unprepare(priv->usb2_trk_clk); + mutex_unlock(&padctl->lock); } @@ -633,8 +637,6 @@ static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl) value |= USB2_PD_TRK; padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); - clk_disable_unprepare(priv->usb2_trk_clk); - mutex_unlock(&padctl->lock); }