From patchwork Mon Apr 17 02:52:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunfeng Yun X-Patchwork-Id: 13213155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82B5BC77B7A for ; Mon, 17 Apr 2023 02:52:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229997AbjDQCwW (ORCPT ); Sun, 16 Apr 2023 22:52:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229948AbjDQCwT (ORCPT ); Sun, 16 Apr 2023 22:52:19 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C9E41716; Sun, 16 Apr 2023 19:52:17 -0700 (PDT) X-UUID: d8fac48adcca11edb6b9f13eb10bd0fe-20230417 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=phBD2vwO8iWkQPmc/hArOU7MCQMYMDUaIR/NpBQEQxI=; b=bgMGBa2xJimhb3a4aECTh4uTVzkEAQG0PiXd9j+Qc0g4weo/ERCAKZfw47EXZBtXOFXvUtFLFHsc/s1mUwJ5XshVbFI432V8MGosNdrp9zvs6Ijqoe3TnY22Vjaug5s+GoYzMPnUsCJ462KEZ4hFmkWBRmt25kS8LzH+sR010is=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22,REQID:5476b978-1572-43f1-8a59-2ed28f0a8191,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:90 X-CID-INFO: VERSION:1.1.22,REQID:5476b978-1572-43f1-8a59-2ed28f0a8191,IP:0,URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:90 X-CID-META: VersionHash:120426c,CLOUDID:a6704184-cd9c-45f5-8134-710979e3df0e,B ulkID:230417105211YF4HE74T,BulkQuantity:1,Recheck:0,SF:19|48|38|29|28|17,T C:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:40,QS:nil,BEC:nil,COL :0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-UUID: d8fac48adcca11edb6b9f13eb10bd0fe-20230417 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 337964305; Mon, 17 Apr 2023 10:52:10 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Mon, 17 Apr 2023 10:52:09 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Mon, 17 Apr 2023 10:52:09 +0800 From: Chunfeng Yun To: Greg Kroah-Hartman , Rob Herring CC: Chunfeng Yun , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , , , , , , Tianping Fang , Rob Herring Subject: [PATCH v3 6/7] dt-bindings: usb: mtu3: add two optional clocks Date: Mon, 17 Apr 2023 10:52:02 +0800 Message-ID: <20230417025203.18097-6-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230417025203.18097-1-chunfeng.yun@mediatek.com> References: <20230417025203.18097-1-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add optional clock 'xhci_ck' and 'frmcnt_ck'; Reviewed-by: Rob Herring Signed-off-by: Chunfeng Yun --- v3: add reviewed-by Rob v2: remove assigned-clocks* properties suggested by Rob --- Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml index d2655173e108..3d403d944453 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml @@ -66,6 +66,8 @@ properties: - description: Reference clock used by low power mode etc - description: Mcu bus clock for register access - description: DMA bus clock for data transfer + - description: DRD controller clock + - description: Frame count clock clock-names: minItems: 1 @@ -74,6 +76,8 @@ properties: - const: ref_ck - const: mcu_ck - const: dma_ck + - const: xhci_ck + - const: frmcnt_ck phys: description: