From patchwork Tue Oct 15 21:28:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 13837239 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01A221FF030; Tue, 15 Oct 2024 21:29:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729027795; cv=none; b=ZN3DIJ11cKlg1P3Qo2LvQzZBtlYEUF46S5CNXl7Olgs12OACXkEBfor+Fjlqzsv74D9J+h+VLrSDuKqMmXsVZkpDHPVfPBlEhqc12aHVtUNjjdDlwfTl5T5L8j7qiE5U7EQcLeetumVOinrv70x9ym7UBcCcGY+U7/vDe+c+srY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729027795; c=relaxed/simple; bh=ltXX8jP7pn8uVpu5KSPpn79cIYm5HfBGTiCUp+UHg9k=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SflT6PXw3JYqiZXro+hftgNl1xaZRwe+R90gBIi/9qYJh7T/SFSKheANOwK9ejADgtwt7CRKDkRbA47eePKImVKvl5FGo4S0G6M3hy4C9LQ0ysK9Yw7ztX/B5NoE4vxkMxMlrs47QhGrnfcmb3WUMAdfZRG+i6ZlVEmliYFqfn4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=alZlreEr; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="alZlreEr" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49FLMYAC021755; Tue, 15 Oct 2024 21:29:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= AN6ZcvMWlqNjOXpEc6FdiWAhkqYqJERCJ3muWeL5xeM=; b=alZlreErrnd/V2FG whrFhbR8hhJlv7x+0C3M8Yiyq76gdjtmrE6VXIC4Qx/K1AqJCrIiFxktcNCtBt1Y L0N5AC3m3kIBdtXBPV8nMX5Qpj70v+5eVxt4+1Jh+hlT7VFaXRHV6XLNpFyzwjFN tZd8gycxMkRG8ksB+8r8ThokN38ZLsLE+I1sLf6ft2MBxstoada+3g/RdZq5JJAI f6CruNPU+p7MQupq/hdumUucXna8cS+BpT0h8yk6vKRk3cun1skRWmFqvuE7J9pw 4FDDUWBgA+3eeyX+AVxV4U2/GDzSwFscty5dBuv0NxdYDIwTxLHxN2Z/388FeNA6 i0P0KQ== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 427g2rs46q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Oct 2024 21:29:30 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49FLTTLd022334 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Oct 2024 21:29:29 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 15 Oct 2024 14:29:29 -0700 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , , Wesley Cheng Subject: [PATCH v29 08/33] usb: host: xhci-plat: Set XHCI max interrupters if property is present Date: Tue, 15 Oct 2024 14:28:50 -0700 Message-ID: <20241015212915.1206789-9-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241015212915.1206789-1-quic_wcheng@quicinc.com> References: <20241015212915.1206789-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Gny5UmXzsYMZKOuxGrReawPXD8HYQrvB X-Proofpoint-GUID: Gny5UmXzsYMZKOuxGrReawPXD8HYQrvB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 phishscore=0 malwarescore=0 clxscore=1015 spamscore=0 adultscore=0 mlxlogscore=999 impostorscore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410150143 Some platforms may want to limit the number of XHCI interrupters allocated. This is passed to xhci-plat as a device property. Ensure that this is read and the max_interrupters field is set. Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci-plat.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 3d071b875308..1c12cadc02a1 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -258,6 +258,8 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); + device_property_read_u16(tmpdev, "num-hc-interrupters", + &xhci->max_interrupters); } /*