diff mbox series

[v2,2/4] usb: dwc3: Set the reference clock period

Message ID b7a260bb642a2cdaa70273c4b4edc27702c76f0d.1544235317.git.thinhn@synopsys.com (mailing list archive)
State New, archived
Headers show
Series usb: dwc3: Introduce refclk lpm | expand

Commit Message

Thinh Nguyen Dec. 8, 2018, 2:27 a.m. UTC 
This patch writes the reference clock period provided from the device
property to GUCTL.REFCLKPER. This value informs the controller of the
reference clock period if the default Core Consultant setting
GUCTL.REFCLKPER is different.

Typical reference clock periods are 25, 41, 50, 52, 58, and 62ns.

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
---
Changes in v2:
- Remove reference clock period validations
- Revise commit message

 drivers/usb/dwc3/core.c | 9 +++++++++
 drivers/usb/dwc3/core.h | 4 ++++
 2 files changed, 13 insertions(+)
diff mbox series

Patch

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index a1b126f90261..32c38f71f874 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -962,6 +962,13 @@  static int dwc3_core_init(struct dwc3 *dwc)
 		goto err4;
 	}
 
+	if (dwc->refclk_period_ns) {
+		reg = dwc3_readl(dwc->regs, DWC3_GUCTL);
+		reg &= ~DWC3_GUCTL_REFCLKPER(~0);
+		reg |= DWC3_GUCTL_REFCLKPER(dwc->refclk_period_ns);
+		dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
+	}
+
 	/*
 	 * ENDXFER polling is available on version 3.10a and later of
 	 * the DWC_usb3 controller. It is NOT available in the
@@ -1254,6 +1261,8 @@  static void dwc3_get_properties(struct dwc3 *dwc)
 				"snps,usb3_lpm_capable");
 	dwc->usb2_lpm_disable = device_property_read_bool(dev,
 				"snps,usb2-lpm-disable");
+	device_property_read_u8(dev, "snps,refclk-period-ns",
+				&dwc->refclk_period_ns);
 	device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd",
 				&rx_thr_num_pkt_prd);
 	device_property_read_u8(dev, "snps,rx-max-burst-prd",
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index df876418cb78..e190728104e0 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -247,6 +247,7 @@ 
 
 /* Global User Control Register */
 #define DWC3_GUCTL_HSTINAUTORETRY	BIT(14)
+#define DWC3_GUCTL_REFCLKPER(n)		(((n) & 0x3ff) << 22)
 
 /* Global User Control 1 Register */
 #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS	BIT(28)
@@ -1017,6 +1018,8 @@  struct dwc3_scratchpad_array {
  *			change quirk.
  * @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate
  *			check during HS transmit.
+ * @refclk_period_ns: if set, inform the controller this value as the reference
+ *			clock period in nanoseconds.
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  * @tx_de_emphasis: Tx de-emphasis value
  * 	0	- -6dB de-emphasis
@@ -1169,6 +1172,7 @@  struct dwc3 {
 	u8			rx_max_burst_prd;
 	u8			tx_thr_num_pkt_prd;
 	u8			tx_max_burst_prd;
+	u8			refclk_period_ns;
 
 	const char		*hsphy_interface;