diff mbox series

[net-next,06/19] net: usb: aqc111: Introduce link management

Message ID cec5cd88988e0985e3fdd1343906ef649b01f646.1538734658.git.igor.russkikh@aquantia.com (mailing list archive)
State Superseded
Headers show
Series Add support for Aquantia AQtion USB to 5/2.5GbE devices | expand

Commit Message

Igor Russkikh Oct. 5, 2018, 10:24 a.m. UTC 
From: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com>

Add full hardware initialization sequence and link configuration logic

Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com>
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
---
 drivers/net/usb/aqc111.c | 330 +++++++++++++++++++++++++++++++++++++++++++++++
 drivers/net/usb/aqc111.h |  51 ++++++++
 2 files changed, 381 insertions(+)

Comments

Andrew Lunn Oct. 5, 2018, 5:11 p.m. UTC | #1 
On Fri, Oct 05, 2018 at 10:24:55AM +0000, Igor Russkikh wrote:
> From: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com>
> 
> Add full hardware initialization sequence and link configuration logic

Hi Igor, Dmitry

Please could you explain why you decided to not use drivers/net/phy?
The previous patch introduced basically what you need to export a
standard Linux MDIO bus. From that you can use a standard Linux PHY
driver.

	Andrew
David Miller Oct. 5, 2018, 5:46 p.m. UTC | #2 
From: Igor Russkikh <Igor.Russkikh@aquantia.com>
Date: Fri, 5 Oct 2018 10:24:55 +0000

> +	switch (aqc111_data->link_speed) {
> +	case AQ_INT_SPEED_5G:
> +	{
> +		link_speed = 5000;
> +		reg8 = 0x05;
> +		reg16 = 0x001F;
> +		break;
> +	}

Please do not put curly braces around switch cases.

You aren't declaring local scope variables in these case statements so
the curly braces are completely unnecessary and look ugly.
Andrew Lunn Oct. 6, 2018, 5:35 p.m. UTC | #3 
> @@ -202,6 +319,9 @@ static int aqc111_bind(struct usbnet *dev, struct usb_interface *intf)
>  	dev->net->netdev_ops = &aqc111_netdev_ops;
>  
>  	aqc111_read_fw_version(dev, aqc111_data);
> +	aqc111_data->autoneg = AUTONEG_ENABLE;
> +	aqc111_data->advertised_speed = (usb_speed == USB_SPEED_SUPER) ?
> +					 SPEED_5000 : SPEED_1000;

Hi Igor

I'd be interested in knowing the reasoning behind this.

USB 3 has a raw bandwidth of 5Gbps. But it is a shared bus. So you
have no guaranteed you are actually going to get the needed bandwidth
to support line rate.

USB 2.0 only gives you 480Mbps. So it won't even give you the full
1G. So using the same reasoning for USB3, maybe you should limit it to
100Mbps?

I personally would not apply restrictions on the PHY depending on what
USB is being used.

This becomes more important when using SFPs. If i have an SFP peer
which is expecting 2500Base-X, but because the device is plugged into
USB 2 port it is forced to use 1000Base-X, it is not going to get
link.

	Andrew
Igor Russkikh Oct. 8, 2018, 9:29 a.m. UTC | #4 
Hi Andrew,

>>  	aqc111_read_fw_version(dev, aqc111_data);
>> +	aqc111_data->autoneg = AUTONEG_ENABLE;
>> +	aqc111_data->advertised_speed = (usb_speed == USB_SPEED_SUPER) ?
>> +					 SPEED_5000 : SPEED_1000;
> 

> USB 3 has a raw bandwidth of 5Gbps. But it is a shared bus. So you
> have no guaranteed you are actually going to get the needed bandwidth
> to support line rate.
> 
> USB 2.0 only gives you 480Mbps. So it won't even give you the full
> 1G. So using the same reasoning for USB3, maybe you should limit it to
> 100Mbps?
> 
> I personally would not apply restrictions on the PHY depending on what
> USB is being used.

First argument here is to reduce power consumption on USB2.
2.5G/5G uses OCSGMII/XFI serdes which consumes more power.
Of course in normal conditions usb2 is capable to feed that, but
the risk still exists on legacy usb2 hardware.

> This becomes more important when using SFPs. If i have an SFP peer
> which is expecting 2500Base-X, but because the device is plugged into
> USB 2 port it is forced to use 1000Base-X, it is not going to get
> link.

Do you mean here 2500Base-T? This particular device is an integrated
mac+phy, thus we can't easily link it with -X SFP endpoint.

Although its not a common usecase for the consumer dongle to connect to SFP
endpoints, think your comment is quite reasonable.
We'll clarify this internally.


Regards,
  Igor
Andrew Lunn Oct. 8, 2018, 12:12 p.m. UTC | #5 
On Mon, Oct 08, 2018 at 09:29:26AM +0000, Igor Russkikh wrote:
> Hi Andrew,
> 
> >>  	aqc111_read_fw_version(dev, aqc111_data);
> >> +	aqc111_data->autoneg = AUTONEG_ENABLE;
> >> +	aqc111_data->advertised_speed = (usb_speed == USB_SPEED_SUPER) ?
> >> +					 SPEED_5000 : SPEED_1000;
> > 
> 
> > USB 3 has a raw bandwidth of 5Gbps. But it is a shared bus. So you
> > have no guaranteed you are actually going to get the needed bandwidth
> > to support line rate.
> > 
> > USB 2.0 only gives you 480Mbps. So it won't even give you the full
> > 1G. So using the same reasoning for USB3, maybe you should limit it to
> > 100Mbps?
> > 
> > I personally would not apply restrictions on the PHY depending on what
> > USB is being used.
> 
> First argument here is to reduce power consumption on USB2.
> 2.5G/5G uses OCSGMII/XFI serdes which consumes more power.
> Of course in normal conditions usb2 is capable to feed that, but
> the risk still exists on legacy usb2 hardware.

O.K, that sounds like a sensible argument. Please add a comment. I
hope the Marketing Department also understand this. It should probably
explain this on the product packaging.

> > This becomes more important when using SFPs. If i have an SFP peer
> > which is expecting 2500Base-X, but because the device is plugged into
> > USB 2 port it is forced to use 1000Base-X, it is not going to get
> > link.
> 
> Do you mean here 2500Base-T? This particular device is an integrated
> mac+phy, thus we can't easily link it with -X SFP endpoint.

I only went to find the product brief after finishing the
review. Without an external SERDES interface, SFP is not possible. But
from your comment above, i does sound like internally it has such a
SERDES. So it is not out of the question a follow up device is
produced which could connect to an SFP. I actually have a no-name USB
based SFP dongle...

      Andrew
Igor Russkikh Oct. 8, 2018, 1:22 p.m. UTC | #6 
Hi Andrew,

> Hi Igor, Dmitry
> 
> Please could you explain why you decided to not use drivers/net/phy?
> The previous patch introduced basically what you need to export a
> standard Linux MDIO bus. From that you can use a standard Linux PHY
> driver.

Thats again because of this product has tightly integrated MAC+Phy.
MAC FW controls system interface and reports/alters link state
as a joint state on copper and SIF (even in dpa direct phy mode).

We can't extract phy api into a standalone fully functional phylib therefore.
Also as far as I know this particular phy is not available in the wild.

Regards,
  Igor
Oliver Neukum Oct. 8, 2018, 1:59 p.m. UTC | #7 
On Fr, 2018-10-05 at 10:24 +0000, Igor Russkikh wrote:
> From: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com>
> 
> +static void aqc111_configure_rx(struct usbnet *dev,
> +				struct aqc111_data *aqc111_data)
> +{
> +	u8 reg8 = 0;
> +	u8 queue_num = 0;
> +	u16 reg16 = 0;
> +	u16 link_speed = 0, usb_host = 0;
> +	u8 buf[5] = { 0 };

DMA on stack.

> +	enum usb_device_speed usb_speed = dev->udev->speed;
> +
> +	buf[0] = 0x00;
> +	buf[1] = 0xF8;
> +	buf[2] = 0x07;
> +	switch (aqc111_data->link_speed) {
> +	case AQ_INT_SPEED_5G:
> +	{
> +		link_speed = 5000;
> +		reg8 = 0x05;
> +		reg16 = 0x001F;
> +		break;
> +	}
> +	case AQ_INT_SPEED_2_5G:
> +	{
> +		link_speed = 2500;
> +		reg16 = 0x003F;
> +		break;
> +	}
> +	case AQ_INT_SPEED_1G:
> +	{
> +		link_speed = 1000;
> +		reg16 = 0x009F;
> +		break;
> +	}
> +	case AQ_INT_SPEED_100M:
> +	{
> +		link_speed = 100;
> +		queue_num = 1;
> +		reg16 = 0x063F;
> +		buf[1] = 0xFB;
> +		buf[2] = 0x4;
> +		break;
> +	}
> +	}
> +
> +	if (aqc111_data->dpa) {
> +		/* Set Phy Flow control */
> +		aq_mdio_write_cmd(dev, AQ_GLB_ING_PAUSE_CTRL_REG,
> +				  AQ_PHY_AUTONEG_ADDR, 2, &reg16);
> +		aq_mdio_write_cmd(dev, AQ_GLB_EGR_PAUSE_CTRL_REG,
> +				  AQ_PHY_AUTONEG_ADDR, 2, &reg16);
> +	}
> +
> +	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_INTER_PACKET_GAP_0,
> +			 1, 1, &reg8);
> +
> +	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TX_PAUSE_RESEND_T, 3, 3, buf);
> +
> +	switch (usb_speed) {

Needs to handle all speeds. And please add a comment explaining the
rationale.

> +	case USB_SPEED_SUPER:
> +	{
> +		usb_host = 3;
> +		break;
> +	}
> +	case USB_SPEED_HIGH:
> +	{
> +		usb_host = 2;
> +		break;
> +	}
> +	case USB_SPEED_FULL:
> +	case USB_SPEED_LOW:
> +	{
> +		usb_host = 1;
> +		queue_num = 0;
> +		break;
> +	}
> +	default:
> +	{
> +		usb_host = 0;
> +		break;
> +	}
> +	}
> +
> +	memcpy(buf, &AQC111_BULKIN_SIZE[queue_num], 5);
> +	/* RX bulk configuration */
> +	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, 5, 5, buf);
> +
> +	/* Set high low water level */
> +	reg16 = 0x0810;
> +
> +	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,
> +			 2, 2, &reg16);
> +	netdev_info(dev->net, "Link Speed %d, USB %d", link_speed, usb_host);
> +}

	Regards
		Oliver
diff mbox series

Patch

diff --git a/drivers/net/usb/aqc111.c b/drivers/net/usb/aqc111.c
index 30219bb6ddfd..1d366f4a1c51 100644
--- a/drivers/net/usb/aqc111.c
+++ b/drivers/net/usb/aqc111.c
@@ -150,6 +150,122 @@  static int aq_mdio_write_cmd(struct usbnet *dev, u16 value, u16 index,
 	return aqc111_write_cmd(dev, AQ_PHY_CMD, value, index, size, data);
 }
 
+static void aqc111_set_phy_speed_fw_iface(struct usbnet *dev,
+					  struct aqc111_data *aqc111_data)
+{
+	aqc111_write_cmd(dev, AQ_PHY_OPS, 0, 0, 4, &aqc111_data->phy_ops);
+}
+
+static void aqc111_set_phy_speed_direct(struct usbnet *dev,
+					struct aqc111_data *aqc111_data)
+{
+	u16 reg16_1 = 0;
+	u16 reg16_2 = 0;
+	u16 reg16_3 = 0;
+
+	/* Disable auto-negotiation */
+	reg16_1 = AQ_ANEG_EX_PAGE_CTRL;
+	aq_mdio_write_cmd(dev, AQ_AUTONEG_STD_CTRL_REG, AQ_PHY_AUTONEG_ADDR,
+			  2, &reg16_1);
+
+	reg16_1 = AQ_ANEG_EX_PHY_ID | AQ_ANEG_ADV_AQRATE;
+	if (aqc111_data->phy_ops.downshift) {
+		reg16_1 |= AQ_ANEG_EN_DSH;
+		reg16_1 |= aqc111_data->phy_ops.dsh_ret_cnt & 0x0F;
+	}
+
+	reg16_2 = AQ_ANEG_ADV_LT;
+	if (aqc111_data->phy_ops.pause)
+		reg16_3 |= AQ_ANEG_PAUSE;
+
+	if (aqc111_data->phy_ops.asym_pause)
+		reg16_3 |= AQ_ANEG_ASYM_PAUSE;
+
+	if (aqc111_data->phy_ops.adv_5G) {
+		reg16_1 |= AQ_ANEG_ADV_5G_N;
+		reg16_2 |= AQ_ANEG_ADV_5G_T;
+	}
+	if (aqc111_data->phy_ops.adv_2G5) {
+		reg16_1 |= AQ_ANEG_ADV_2G5_N;
+		reg16_2 |= AQ_ANEG_ADV_2G5_T;
+	}
+	if (aqc111_data->phy_ops.adv_1G)
+		reg16_1 |= AQ_ANEG_ADV_1G;
+
+	if (aqc111_data->phy_ops.adv_5G)
+		reg16_3 |= AQ_ANEG_100M;
+
+	aq_mdio_write_cmd(dev, AQ_AUTONEG_VEN_PROV1_REG,
+			  AQ_PHY_AUTONEG_ADDR, 2, &reg16_1);
+	aq_mdio_write_cmd(dev, AQ_AUTONEG_10GT_CTRL_REG,
+			  AQ_PHY_AUTONEG_ADDR, 2, &reg16_2);
+
+	aq_mdio_read_cmd(dev, AQ_AUTONEG_ADV_REG, AQ_PHY_AUTONEG_ADDR,
+			 2, &reg16_1);
+	reg16_1 &= ~AQ_ANEG_ABILITY_MASK;
+	reg16_1 |= reg16_3;
+	aq_mdio_write_cmd(dev, AQ_AUTONEG_ADV_REG, AQ_PHY_AUTONEG_ADDR,
+			  2, &reg16_1);
+
+	/* Restart auto-negotiation */
+	reg16_1 = AQ_ANEG_EX_PAGE_CTRL | AQ_ANEG_EN_ANEG |
+		  AQ_ANEG_RESTART_ANEG;
+
+	aq_mdio_write_cmd(dev, AQ_AUTONEG_STD_CTRL_REG,
+			  AQ_PHY_AUTONEG_ADDR, 2, &reg16_1);
+}
+
+static void aqc111_set_phy_speed(struct usbnet *dev, u8 autoneg, u16 speed)
+{
+	struct aqc111_data *aqc111_data = (struct aqc111_data *)dev->data[0];
+
+	aqc111_data->phy_ops.advertising = 0;
+	aqc111_data->phy_ops.pause = 1;
+	aqc111_data->phy_ops.asym_pause = 1;
+	aqc111_data->phy_ops.downshift = 1;
+	aqc111_data->phy_ops.dsh_ret_cnt = 3;
+	if (autoneg == AUTONEG_ENABLE) {
+		switch (speed) {
+		case SPEED_5000:
+			aqc111_data->phy_ops.adv_5G = 1;
+		case SPEED_2500:
+			aqc111_data->phy_ops.adv_2G5 = 1;
+		case SPEED_1000:
+			aqc111_data->phy_ops.adv_1G = 1;
+		case SPEED_100:
+			aqc111_data->phy_ops.adv_100M = 1;
+		}
+	} else {
+		switch (speed) {
+		case SPEED_5000:
+		{
+			aqc111_data->phy_ops.adv_5G = 1;
+			break;
+		}
+		case SPEED_2500:
+		{
+			aqc111_data->phy_ops.adv_2G5 = 1;
+			break;
+		}
+		case SPEED_1000:
+		{
+			aqc111_data->phy_ops.adv_1G = 1;
+			break;
+		}
+		case SPEED_100:
+		{
+			aqc111_data->phy_ops.adv_100M = 1;
+			break;
+		}
+		}
+	}
+
+	if (aqc111_data->dpa)
+		aqc111_set_phy_speed_direct(dev, aqc111_data);
+	else
+		aqc111_set_phy_speed_fw_iface(dev, aqc111_data);
+}
+
 static const struct net_device_ops aqc111_netdev_ops = {
 	.ndo_open		= usbnet_open,
 	.ndo_stop		= usbnet_stop,
@@ -176,6 +292,7 @@  static int aqc111_bind(struct usbnet *dev, struct usb_interface *intf)
 	int ret;
 	struct usb_device *udev = interface_to_usbdev(intf);
 	struct aqc111_data *aqc111_data;
+	enum usb_device_speed usb_speed = dev->udev->speed;
 
 	/* Check if vendor configuration */
 	if (udev->actconfig->desc.bConfigurationValue != 1) {
@@ -202,6 +319,9 @@  static int aqc111_bind(struct usbnet *dev, struct usb_interface *intf)
 	dev->net->netdev_ops = &aqc111_netdev_ops;
 
 	aqc111_read_fw_version(dev, aqc111_data);
+	aqc111_data->autoneg = AUTONEG_ENABLE;
+	aqc111_data->advertised_speed = (usb_speed == USB_SPEED_SUPER) ?
+					 SPEED_5000 : SPEED_1000;
 
 	return 0;
 }
@@ -227,6 +347,7 @@  static void aqc111_unbind(struct usbnet *dev, struct usb_interface *intf)
 		aqc111_write_cmd_nopm(dev, AQ_PHY_POWER, 0,
 				      0, 1, &reg8);
 	} else {
+		aqc111_data->phy_ops.advertising = 0;
 		aqc111_data->phy_ops.low_power = 1;
 		aqc111_data->phy_ops.phy_power = 0;
 		aqc111_write_cmd_nopm(dev, AQ_PHY_OPS, 0, 0,
@@ -236,13 +357,212 @@  static void aqc111_unbind(struct usbnet *dev, struct usb_interface *intf)
 	kfree(aqc111_data);
 }
 
+static void aqc111_status(struct usbnet *dev, struct urb *urb)
+{
+	struct aqc111_int_data *event = NULL;
+	struct aqc111_data *aqc111_data = (struct aqc111_data *)dev->data[0];
+	int link = 0;
+
+	if (urb->actual_length < 8)
+		return;
+
+	event = urb->transfer_buffer;
+
+	if (event->link_status)
+		link = 1;
+	else
+		link = 0;
+
+	aqc111_data->link_speed = event->link_speed;
+	aqc111_data->link = link;
+
+	if (netif_carrier_ok(dev->net) != link)
+		usbnet_defer_kevent(dev, EVENT_LINK_RESET);
+}
+
+static void aqc111_configure_rx(struct usbnet *dev,
+				struct aqc111_data *aqc111_data)
+{
+	u8 reg8 = 0;
+	u8 queue_num = 0;
+	u16 reg16 = 0;
+	u16 link_speed = 0, usb_host = 0;
+	u8 buf[5] = { 0 };
+	enum usb_device_speed usb_speed = dev->udev->speed;
+
+	buf[0] = 0x00;
+	buf[1] = 0xF8;
+	buf[2] = 0x07;
+	switch (aqc111_data->link_speed) {
+	case AQ_INT_SPEED_5G:
+	{
+		link_speed = 5000;
+		reg8 = 0x05;
+		reg16 = 0x001F;
+		break;
+	}
+	case AQ_INT_SPEED_2_5G:
+	{
+		link_speed = 2500;
+		reg16 = 0x003F;
+		break;
+	}
+	case AQ_INT_SPEED_1G:
+	{
+		link_speed = 1000;
+		reg16 = 0x009F;
+		break;
+	}
+	case AQ_INT_SPEED_100M:
+	{
+		link_speed = 100;
+		queue_num = 1;
+		reg16 = 0x063F;
+		buf[1] = 0xFB;
+		buf[2] = 0x4;
+		break;
+	}
+	}
+
+	if (aqc111_data->dpa) {
+		/* Set Phy Flow control */
+		aq_mdio_write_cmd(dev, AQ_GLB_ING_PAUSE_CTRL_REG,
+				  AQ_PHY_AUTONEG_ADDR, 2, &reg16);
+		aq_mdio_write_cmd(dev, AQ_GLB_EGR_PAUSE_CTRL_REG,
+				  AQ_PHY_AUTONEG_ADDR, 2, &reg16);
+	}
+
+	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_INTER_PACKET_GAP_0,
+			 1, 1, &reg8);
+
+	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TX_PAUSE_RESEND_T, 3, 3, buf);
+
+	switch (usb_speed) {
+	case USB_SPEED_SUPER:
+	{
+		usb_host = 3;
+		break;
+	}
+	case USB_SPEED_HIGH:
+	{
+		usb_host = 2;
+		break;
+	}
+	case USB_SPEED_FULL:
+	case USB_SPEED_LOW:
+	{
+		usb_host = 1;
+		queue_num = 0;
+		break;
+	}
+	default:
+	{
+		usb_host = 0;
+		break;
+	}
+	}
+
+	memcpy(buf, &AQC111_BULKIN_SIZE[queue_num], 5);
+	/* RX bulk configuration */
+	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, 5, 5, buf);
+
+	/* Set high low water level */
+	reg16 = 0x0810;
+
+	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,
+			 2, 2, &reg16);
+	netdev_info(dev->net, "Link Speed %d, USB %d", link_speed, usb_host);
+}
+
+static int aqc111_link_reset(struct usbnet *dev)
+{
+	u8 reg8 = 0;
+	u16 reg16 = 0;
+	struct aqc111_data *aqc111_data = (struct aqc111_data *)dev->data[0];
+
+	if (aqc111_data->link == 1) { /* Link up */
+		aqc111_configure_rx(dev, aqc111_data);
+
+		/* Vlan Tag Filter */
+		reg8 = SFR_VLAN_CONTROL_VSO;
+
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,
+				 1, 1, &reg8);
+
+		reg8 = 0x0;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL,
+				 1, 1, &reg8);
+
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMTX_DMA_CONTROL,
+				 1, 1, &reg8);
+
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ARC_CTRL, 1, 1, &reg8);
+
+		reg16 = SFR_RX_CTL_IPE | SFR_RX_CTL_AB;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, 2, &reg16);
+
+		reg8 = SFR_RX_PATH_READY;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
+				 1, 1, &reg8);
+
+		reg8 = SFR_BULK_OUT_EFF_EN;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
+				 1, 1, &reg8);
+
+		reg16 = 0;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
+				 2, 2, &reg16);
+
+		reg16 = SFR_MEDIUM_XGMIIMODE | SFR_MEDIUM_FULL_DUPLEX;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
+				 2, 2, &reg16);
+
+		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
+				2, 2, &reg16);
+
+		reg16 |= SFR_MEDIUM_RECEIVE_EN | SFR_MEDIUM_RXFLOW_CTRLEN |
+			 SFR_MEDIUM_TXFLOW_CTRLEN;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
+				 2, 2, &reg16);
+
+		reg16 = SFR_RX_CTL_IPE | SFR_RX_CTL_AB | SFR_RX_CTL_START;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, 2, &reg16);
+
+		netif_carrier_on(dev->net);
+	} else {
+		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
+				2, 2, &reg16);
+		reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
+				 2, 2, &reg16);
+
+		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, 2, &reg16);
+		reg16 &= ~SFR_RX_CTL_START;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, 2, &reg16);
+
+		reg8 = SFR_BULK_OUT_FLUSH_EN | SFR_BULK_OUT_EFF_EN;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
+				 1, 1, &reg8);
+		reg8 = SFR_BULK_OUT_EFF_EN;
+		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
+				 1, 1, &reg8);
+
+		netif_carrier_off(dev->net);
+	}
+	return 0;
+}
+
 static int aqc111_reset(struct usbnet *dev)
 {
 	u8 reg8 = 0;
 	u16 reg16 = 0;
+	enum usb_device_speed usb_speed;
 	struct aqc111_data *aqc111_data = (struct aqc111_data *)dev->data[0];
 
+	usb_speed = dev->udev->speed;
+
 	/* Power up ethernet PHY */
+	aqc111_data->phy_ops.advertising = 0;
 	aqc111_data->phy_ops.phy_ctrl1 = 0;
 	aqc111_data->phy_ops.phy_ctrl2 = 0;
 
@@ -279,6 +599,12 @@  static int aqc111_reset(struct usbnet *dev)
 		  SFR_MONITOR_MODE_RW_FLAG);
 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);
 
+	netif_carrier_off(dev->net);
+
+	/* Phy advertise */
+	aqc111_set_phy_speed(dev, aqc111_data->autoneg,
+			     aqc111_data->advertised_speed);
+
 	return 0;
 }
 
@@ -307,6 +633,8 @@  static int aqc111_stop(struct usbnet *dev)
 				 4, &aqc111_data->phy_ops);
 	}
 
+	netif_carrier_off(dev->net);
+
 	return 0;
 }
 
@@ -314,6 +642,8 @@  static const struct driver_info aqc111_info = {
 	.description	= "Aquantia AQtion USB to 5GbE Controller",
 	.bind		= aqc111_bind,
 	.unbind		= aqc111_unbind,
+	.status		= aqc111_status,
+	.link_reset	= aqc111_link_reset,
 	.reset		= aqc111_reset,
 	.stop		= aqc111_stop,
 };
diff --git a/drivers/net/usb/aqc111.h b/drivers/net/usb/aqc111.h
index 8738d2c4ae90..5c5602e6d236 100644
--- a/drivers/net/usb/aqc111.h
+++ b/drivers/net/usb/aqc111.h
@@ -18,12 +18,44 @@ 
 #define AQC111_PHY_ID			0x00
 #define AQ_PHY_ADDR(mmd)		((AQC111_PHY_ID << 8) | mmd)
 
+#define AQ_PHY_AUTONEG_MMD		0x07
+#define AQ_PHY_AUTONEG_ADDR		AQ_PHY_ADDR(AQ_PHY_AUTONEG_MMD)
+
+#define AQ_AUTONEG_STD_CTRL_REG		0x0000
+	#define AQ_ANEG_EX_PAGE_CTRL		0x2000
+	#define AQ_ANEG_EN_ANEG			0x1000
+	#define AQ_ANEG_RESTART_ANEG		0x0200
+
+#define AQ_AUTONEG_ADV_REG		0x0010
+	#define AQ_ANEG_100M			0x0100
+	#define AQ_ANEG_PAUSE			0x0400
+	#define AQ_ANEG_ASYM_PAUSE		0x0800
+	#define AQ_ANEG_ABILITY_MASK		0x0FE0
+
+#define AQ_AUTONEG_10GT_CTRL_REG	0x0020
+	#define AQ_ANEG_ADV_10G_T		0x1000
+	#define AQ_ANEG_ADV_5G_T		0x0100
+	#define AQ_ANEG_ADV_2G5_T		0x0080
+	#define AQ_ANEG_ADV_LT			0x0001
+
+#define AQ_AUTONEG_VEN_PROV1_REG	0xC400
+	#define AQ_ANEG_ADV_1G			0x8000
+	#define AQ_ANEG_ADV_AQRATE		0x1000
+	#define AQ_ANEG_ADV_5G_N		0x0800
+	#define AQ_ANEG_ADV_2G5_N		0x0400
+	#define AQ_ANEG_EX_PHY_ID		0x0040
+	#define AQ_ANEG_EN_DSH			0x0010
+	#define AQ_ANEG_DSH_RETRY		0x0003
+
 #define AQ_PHY_GLOBAL_MMD		0x1E
 #define AQ_PHY_GLOBAL_ADDR		AQ_PHY_ADDR(AQ_PHY_GLOBAL_MMD)
 
 #define AQ_GLB_STD_CTRL_REG		0x0000
 	#define AQ_PHY_LOW_POWER_MODE		0x0800
 
+#define AQ_GLB_ING_PAUSE_CTRL_REG	0x7148
+#define AQ_GLB_EGR_PAUSE_CTRL_REG	0x4148
+
 #define AQ_USB_PHY_SET_TIMEOUT		10000
 #define AQ_USB_SET_TIMEOUT		4000
 
@@ -163,6 +195,10 @@  struct aqc111_phy_options {
 };
 
 struct aqc111_data {
+	u8 link_speed;
+	u8 link;
+	u8 autoneg;
+	u32 advertised_speed;
 	struct {
 		u8 major;
 		u8 minor;
@@ -172,6 +208,21 @@  struct aqc111_data {
 	struct aqc111_phy_options phy_ops;
 } __packed;
 
+struct aqc111_int_data {
+	u8 res1;
+	u8 link_speed: 7;
+	u8 link_status: 1;
+	__le16 res2;
+	__le16 res3;
+	__le16 res4;
+} __packed;
+
+#define AQ_INT_SPEED_10G	0x0E
+#define AQ_INT_SPEED_5G		0x0F
+#define AQ_INT_SPEED_2_5G	0x10
+#define AQ_INT_SPEED_1G		0x11
+#define AQ_INT_SPEED_100M	0x13
+
 static struct {
 	unsigned char ctrl;
 	unsigned char timer_l;