From patchwork Sat Nov 3 01:35:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 10666433 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB16B14E2 for ; Sat, 3 Nov 2018 01:35:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C7FD2B585 for ; Sat, 3 Nov 2018 01:35:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9102F2B79A; Sat, 3 Nov 2018 01:35:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 354F32B585 for ; Sat, 3 Nov 2018 01:35:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728356AbeKCKpZ (ORCPT ); Sat, 3 Nov 2018 06:45:25 -0400 Received: from smtprelay.synopsys.com ([198.182.47.9]:37292 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725865AbeKCKpZ (ORCPT ); Sat, 3 Nov 2018 06:45:25 -0400 Received: from mailhost.synopsys.com (mailhost3.synopsys.com [10.12.238.238]) by smtprelay.synopsys.com (Postfix) with ESMTP id 8E99724E0C8F; Fri, 2 Nov 2018 18:35:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1541208954; bh=xJMyP695qD/NekpGQ8papfh2QmPV5K4M73dAUO3UxWs=; h=Date:In-Reply-To:References:From:Subject:To:CC:From; b=iTWbagllaUkGmsyIMookOJkkk6Eq1o4CWi/2U+27zUkYmf7/CiGAmbdvvFyUif1o5 MEr7Vh7yD7UzVJhaRYBHlDSHXl3Sm24ZOg4Atl/X8HRVuhL7FxV3+fR6Lawz0LC9jq 4lXc76Tcxk62t2o1CvMJI4ldDLA5TiUs8BtRX23xVt4/ewZvZHmMJBl/k5VTGv0oLw yNjDtANZDmaLmOb4Y3AY86D+goeyd2OYqsrrlewBHNd36qlIFA89vV9DvuZ5j9eOrT QOyhV10woPHCnWQSKXHnVo8xD0yr0NQp2XYW9MAkQSzJbkhTHHMeeuEx3hIDSbgTd5 cIV+kA8K4E9XA== Received: from US01WEHTC2.internal.synopsys.com (us01wehtc2-vip.internal.synopsys.com [10.12.239.238]) by mailhost.synopsys.com (Postfix) with ESMTP id 7BB193A3C; Fri, 2 Nov 2018 18:35:54 -0700 (PDT) Received: from US01WEHTC3.internal.synopsys.com (10.15.84.232) by US01WEHTC2.internal.synopsys.com (10.12.239.237) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 2 Nov 2018 18:35:54 -0700 Received: from te-lab16 (10.13.184.20) by US01WEHTC3.internal.synopsys.com (10.15.84.231) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 2 Nov 2018 18:35:53 -0700 Received: by te-lab16 (sSMTP sendmail emulation); Fri, 02 Nov 2018 18:35:52 -0700 Date: Fri, 2 Nov 2018 18:35:52 -0700 Message-ID: In-Reply-To: References: From: Thinh Nguyen Subject: [PATCH 2/3] usb: dwc3: Set reference clock period To: Felipe Balbi , CC: John Youn MIME-Version: 1.0 X-Originating-IP: [10.13.184.20] Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Get the reference clock period from the device property and reprogram it during core power-on initialization. Signed-off-by: Thinh Nguyen --- drivers/usb/dwc3/core.c | 22 ++++++++++++++++++++++ drivers/usb/dwc3/core.h | 10 ++++++++++ 2 files changed, 32 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index becfbb87f791..4437db4a1e15 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1001,6 +1001,26 @@ static int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL, reg); } + if (dwc->refclk_period_ns) { + switch (dwc->refclk_period_ns) { + case DWC3_GUCTL_REFCLKPER_25NS: + case DWC3_GUCTL_REFCLKPER_41NS: + case DWC3_GUCTL_REFCLKPER_50NS: + case DWC3_GUCTL_REFCLKPER_52NS: + case DWC3_GUCTL_REFCLKPER_58NS: + case DWC3_GUCTL_REFCLKPER_62NS: + reg = dwc3_readl(dwc->regs, DWC3_GUCTL); + reg &= ~DWC3_GUCTL_REFCLKPER(~0); + reg |= DWC3_GUCTL_REFCLKPER(dwc->refclk_period_ns); + dwc3_writel(dwc->regs, DWC3_GUCTL, reg); + break; + default: + dev_err(dwc->dev, "Invalid refclk period: %dns\n", + dwc->refclk_period_ns); + break; + } + } + /* * Must config both number of packets and max burst settings to enable * RX and/or TX threshold. @@ -1246,6 +1266,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) &hird_threshold); dwc->usb3_lpm_capable = device_property_read_bool(dev, "snps,usb3_lpm_capable"); + device_property_read_u8(dev, "snps,refclk-period-ns", + &dwc->refclk_period_ns); device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", &rx_thr_num_pkt_prd); device_property_read_u8(dev, "snps,rx-max-burst-prd", diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 5bfb62533e0f..5ce985b2e6c7 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -240,6 +240,14 @@ /* Global User Control Register */ #define DWC3_GUCTL_HSTINAUTORETRY BIT(14) +#define DWC3_GUCTL_REFCLKPER(n) (((n) & 0x3ff) << 22) + +#define DWC3_GUCTL_REFCLKPER_25NS 25 +#define DWC3_GUCTL_REFCLKPER_41NS 41 +#define DWC3_GUCTL_REFCLKPER_50NS 50 +#define DWC3_GUCTL_REFCLKPER_52NS 52 +#define DWC3_GUCTL_REFCLKPER_58NS 58 +#define DWC3_GUCTL_REFCLKPER_62NS 62 /* Global User Control 1 Register */ #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) @@ -991,6 +999,7 @@ struct dwc3_scratchpad_array { * change quirk. * @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate * check during HS transmit. + * @refclk_period_ns: reference clock period in nanoseconds. * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk * @tx_de_emphasis: Tx de-emphasis value * 0 - -6dB de-emphasis @@ -1129,6 +1138,7 @@ struct dwc3 { u8 rx_max_burst_prd; u8 tx_thr_num_pkt_prd; u8 tx_max_burst_prd; + u8 refclk_period_ns; const char *hsphy_interface;