From patchwork Tue Sep 29 03:20:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q3J5c3RhbCBHdW8gKOmDreaZtik=?= X-Patchwork-Id: 11804891 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9AD50618 for ; Tue, 29 Sep 2020 03:23:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7EF032184D for ; Tue, 29 Sep 2020 03:23:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="KCM72qlH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727404AbgI2DWy (ORCPT ); Mon, 28 Sep 2020 23:22:54 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:54508 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727177AbgI2DWw (ORCPT ); Mon, 28 Sep 2020 23:22:52 -0400 X-UUID: bdea6d9d644345e3b0230b60c2a8082d-20200929 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=GH+44kRU1TnZbUE2nlOmR4VgS/G/oHtxMJIqsP+TCAI=; b=KCM72qlHLx0W9y65dKZBCuKOWd+XxqKBMRj1Ba5Z07rW7G59jR9znPb/scRYXBmwxhbbRfkywrrMBlZMOYDmwZ2dXFq0lc7o2vMKqahSD/XsJw9hBQSk+nY/fOHfSIPNPFvCM9wX49YuWhbjYsLzSjjp/TsOfZm3M5BolIn+rfo=; X-UUID: bdea6d9d644345e3b0230b60c2a8082d-20200929 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1548421223; Tue, 29 Sep 2020 11:22:43 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 29 Sep 2020 11:22:40 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 29 Sep 2020 11:22:40 +0800 From: Crystal Guo To: , , CC: , , , , , Subject: [v5,0/4] watchdog: mt8192: add wdt support Date: Tue, 29 Sep 2020 11:20:01 +0800 Message-ID: <20200929032005.15169-1-crystal.guo@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org v5 changes: fix typos on: https://patchwork.kernel.org/patch/11697493/ v4 changes: revise commit messages. v3 changes: https://patchwork.kernel.org/patch/11692731/ https://patchwork.kernel.org/patch/11692767/ https://patchwork.kernel.org/patch/11692729/ https://patchwork.kernel.org/patch/11692771/ https://patchwork.kernel.org/patch/11692733/ Crystal Guo (4): dt-binding: mediatek: watchdog: fix the description of compatible dt-binding: mediatek: mt8192: update mtk-wdt document dt-binding: mt8192: add toprgu reset-controller head file watchdog: mt8192: add wdt support .../devicetree/bindings/watchdog/mtk-wdt.txt | 5 ++-- drivers/watchdog/mtk_wdt.c | 6 +++++ .../dt-bindings/reset-controller/mt8192-resets.h | 30 ++++++++++++++++++++++ 3 files changed, 39 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/reset-controller/mt8192-resets.h