From patchwork Sun Jun 19 15:12:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 12886716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D9E2C43334 for ; Sun, 19 Jun 2022 15:15:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234559AbiFSPPf (ORCPT ); Sun, 19 Jun 2022 11:15:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237361AbiFSPNE (ORCPT ); Sun, 19 Jun 2022 11:13:04 -0400 Received: from maillog.nuvoton.com (maillog.nuvoton.com [202.39.227.15]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8AD7E63A1; Sun, 19 Jun 2022 08:13:01 -0700 (PDT) Received: from NTHCCAS04.nuvoton.com (NTHCCAS04.nuvoton.com [10.1.8.29]) by maillog.nuvoton.com (Postfix) with ESMTP id 946C81C8123F; Sun, 19 Jun 2022 23:12:40 +0800 (CST) Received: from NTHCCAS02.nuvoton.com (10.1.9.121) by NTHCCAS04.nuvoton.com (10.1.8.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Sun, 19 Jun 2022 23:12:40 +0800 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCCAS02.nuvoton.com (10.1.9.121) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Sun, 19 Jun 2022 23:12:28 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Sun, 19 Jun 2022 23:12:27 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 0A26962E6B; Sun, 19 Jun 2022 18:12:26 +0300 (IDT) From: Tomer Maimon To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Tomer Maimon Subject: [PATCH v3 00/18] Introduce Nuvoton Arbel NPCM8XX BMC SoC Date: Sun, 19 Jun 2022 18:12:07 +0300 Message-ID: <20220619151225.209029-1-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org This patchset adds initial support for the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC family. The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. The NPCM8XX computing subsystem comprises a quadcore ARM Cortex A35 ARM-V8 architecture. This patchset adds minimal architecture and drivers such as: Clocksource, Clock, Reset, and WD. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board. Addressed comments from: - Arnd Bergmann : https://www.spinics.net/lists/arm-kernel/msg986516.html https://www.spinics.net/lists/arm-kernel/msg986540.html - Stephen Boyd: https://www.spinics.net/lists/devicetree/msg507280.html - Krzysztof Kozlowski: https://www.spinics.net/lists/kernel/msg4389776.html https://www.spinics.net/lists/arm-kernel/msg986462.html https://www.spinics.net/lists/linux-clk/msg71589.html https://www.spinics.net/lists/arm-kernel/msg987286.html https://www.spinics.net/lists/arm-kernel/msg987099.html https://www.spinics.net/lists/kernel/msg4389821.html - Rob Herring : https://www.spinics.net/lists/arm-kernel/msg986655.html Changes since version 2: - Remove NPCM8xx WDT compatible patch. - Remove NPCM8xx UART compatible patch. - NPCM8XX clock driver - Add debug new line. - Add 25M fixed rate clock. - Remove unused clocks and clock name from dt-binding. - NPCM reset driver - Revert to npcm7xx dt-binding. - Skip dt binding quotes. - Adding DTS backward compatibility. - Remove NPCM8xx binding include file. - Warp commit message. - NPCM8XX device tree: - Remove unused clock nodes (used in the clock driver) - Modify gcr and rst node names. Changes since version 1: - NPCM8XX clock driver - Modify dt-binding. - Remove unsed definition and include. - Include alphabetically. - Use clock devm. - NPCM reset driver - Modify dt-binding. - Modify syscon name. - Add syscon support to NPCM7XX dts reset node. - use data structure. - NPCM8XX device tree: - Modify evb compatible name. - Add NPCM7xx compatible. - Remove disable nodes from the EVB DTS. Tomer Maimon (18): dt-bindings: timer: npcm: Add npcm845 compatible string clocksource: timer-npcm7xx: Add NPCM845 timer support dt-bindings: serial: 8250: Add npcm845 compatible string dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock clk: npcm8xx: add clock controller dt-bindings: reset: npcm: add GCR syscon property ARM: dts: nuvoton: add reset syscon property reset: npcm: using syscon instead of device data dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: Add NPCM8XX support dt-bindings: arm: npcm: Add maintainer dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: defconfig: Add Nuvoton NPCM family support .../devicetree/bindings/arm/npcm/npcm.yaml | 7 + .../bindings/arm/npcm/nuvoton,gcr.yaml | 2 + .../bindings/clock/nuvoton,npcm845-clk.yaml | 49 ++ .../bindings/reset/nuvoton,npcm750-reset.yaml | 9 +- .../devicetree/bindings/serial/8250.yaml | 1 + .../bindings/timer/nuvoton,npcm7xx-timer.yaml | 2 + .../bindings/watchdog/nuvoton,npcm-wdt.txt | 3 +- MAINTAINERS | 2 + arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 1 + arch/arm64/Kconfig.platforms | 11 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/nuvoton/Makefile | 2 + .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 170 ++++ .../boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 30 + .../boot/dts/nuvoton/nuvoton-npcm845.dtsi | 76 ++ arch/arm64/configs/defconfig | 3 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 1 + drivers/clk/clk-npcm8xx.c | 760 ++++++++++++++++++ drivers/clocksource/timer-npcm7xx.c | 1 + drivers/reset/reset-npcm.c | 206 ++++- .../dt-bindings/clock/nuvoton,npcm8xx-clock.h | 49 ++ 22 files changed, 1356 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi create mode 100644 drivers/clk/clk-npcm8xx.c create mode 100644 include/dt-bindings/clock/nuvoton,npcm8xx-clock.h