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Wed, 2 Oct 2019 07:35:23 +0000 From: To: , , , , , , CC: , , Subject: [PATCH 1/3] dt-bindings: watchdog: sam9x60_wdt: add bindings Thread-Topic: [PATCH 1/3] dt-bindings: watchdog: sam9x60_wdt: add bindings Thread-Index: AQHVePPzWPdzlzB6XEGHjkU1SLbB6g== Date: Wed, 2 Oct 2019 07:35:23 +0000 Message-ID: <1570001371-8174-1-git-send-email-eugen.hristev@microchip.com> Accept-Language: en-US, ro-RO Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR0401CA0003.eurprd04.prod.outlook.com (2603:10a6:800:4a::13) To DM5PR11MB1242.namprd11.prod.outlook.com (2603:10b6:3:14::8) x-mailer: git-send-email 2.7.4 x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 711fcff9-eab6-4d74-a8f1-08d7470b160b x-ms-traffictypediagnostic: DM5PR11MB1434: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; x-forefront-prvs: 0178184651 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(346002)(39860400002)(376002)(396003)(366004)(136003)(199004)(189003)(3846002)(66066001)(7736002)(6116002)(6486002)(256004)(2201001)(25786009)(305945005)(26005)(36756003)(2501003)(486006)(86362001)(8936002)(6436002)(186003)(2616005)(476003)(81166006)(81156014)(71190400001)(71200400001)(99286004)(110136005)(316002)(102836004)(8676002)(2906002)(5660300002)(66476007)(6512007)(64756008)(66446008)(66556008)(54906003)(66946007)(478600001)(107886003)(4326008)(14454004)(6506007)(386003)(50226002)(52116002);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR11MB1434;H:DM5PR11MB1242.namprd11.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: microchip.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: l4YVG23j1Zq6oh1G92jLZmNRJHLPdXNJHZ/GDTs6ekW6xpm/cBr3wMGtEpJWT0/AQ+a761imRBrpmpv85aPLGWL7phRrPruyWu1FHu9xYNJeRKmKBe3myY2ayQQhCZSft+LzNuZ0LKuuF+sPFQRt25FQUT1CCKArVQeAn58pXw8v4gdXTJc/4CVghnrDakOxdZQZT0KS3nf331g4zBZLc9MLNmDRRZoVlJm+4lrEP975vZmsiX7765ZzDCnfrFuOfmLYksM8uWnpze7bbCIaRdtpSF4y8hWKU/UAxtkjp5QCS6A7lFdE6BOShKOCaG1+U3J4X0t0JJBhuQR1RtVAQGuMzqmTqVLuTfc/1MBuG5M83RszvWYjH8zqLcjg2k7iMkhyn/Byd+lvEO/UYhp65wODnj7djaJIArWfW7mTb8g= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 711fcff9-eab6-4d74-a8f1-08d7470b160b X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Oct 2019 07:35:23.8488 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: HdOF6vDe94ktP5Mcs2MEpDZni3exfyhfV+/K2x2Gyos523CRh81dMruVztjG6Jermhone4fdKdRaFU8ODwh2sT6n7F1lMc9/+iZyQDn5u4M= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR11MB1434 Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: Eugen Hristev Add bindings for Microchip SAM9X60 Watchdog Timer It has the same bindings as Documentation/devicetree/bindings/watchdog/atmel-sama5d4-wdt.txt except the compatible. Signed-off-by: Eugen Hristev --- .../devicetree/bindings/watchdog/sam9x60-wdt.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/sam9x60-wdt.txt diff --git a/Documentation/devicetree/bindings/watchdog/sam9x60-wdt.txt b/Documentation/devicetree/bindings/watchdog/sam9x60-wdt.txt new file mode 100644 index 00000000..74b4e2d --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/sam9x60-wdt.txt @@ -0,0 +1,34 @@ +* Microchip SAM9X60 Watchdog Timer (WDT) Controller + +Required properties: +- compatible: "microchip,sam9x60-wdt" +- reg: base physical address and length of memory mapped region. + +Optional properties: +- timeout-sec: watchdog timeout value (in seconds). +- interrupts: interrupt number to the CPU. +- atmel,watchdog-type: should be "hardware" or "software". + "hardware": enable watchdog fault reset. A watchdog fault triggers + watchdog reset. + "software": enable watchdog fault interrupt. A watchdog fault asserts + watchdog interrupt. +- atmel,idle-halt: present if you want to stop the watchdog when the CPU is + in idle state. + CAUTION: This property should be used with care, it actually makes the + watchdog not counting when the CPU is in idle state, therefore the + watchdog reset time depends on mean CPU usage and will not reset at all + if the CPU stop working while it is in idle state, which is probably + not what you want. +- atmel,dbg-halt: present if you want to stop the watchdog when the CPU is + in debug state. + +Example: + watchdog@ffffff80 { + compatible = "microchip,sam9x60-wdt"; + reg = <0xffffff80 0x24>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 5>; + timeout-sec = <10>; + atmel,watchdog-type = "hardware"; + atmel,dbg-halt; + atmel,idle-halt; + };