| Message ID | 1589555337-5498-16-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | RZ/G1H describe I2C, IIC, MMC0, SATA, AVB, RWDT and APMU nodes | expand |
On Fri, May 15, 2020 at 04:08:55PM +0100, Lad Prabhakar wrote: > Add DT nodes for the Advanced Power Management Units (APMU), and use the > enable-method to point out that the APMU should be used for SMP support. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi index 1fe65f7..da75767 100644 --- a/arch/arm/boot/dts/r8a7742.dtsi +++ b/arch/arm/boot/dts/r8a7742.dtsi @@ -18,6 +18,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "renesas,apmu"; cpu0: cpu@0 { device_type = "cpu"; @@ -305,6 +306,18 @@ #reset-cells = <1>; }; + apmu@e6151000 { + compatible = "renesas,r8a7742-apmu", "renesas,apmu"; + reg = <0 0xe6151000 0 0x188>; + cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; + }; + + apmu@e6152000 { + compatible = "renesas,r8a7742-apmu", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; + }; + rst: reset-controller@e6160000 { compatible = "renesas,r8a7742-rst"; reg = <0 0xe6160000 0 0x0100>;