From patchwork Mon Mar 4 22:51:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 10838771 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D52041399 for ; Mon, 4 Mar 2019 22:52:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C0A992BC75 for ; Mon, 4 Mar 2019 22:52:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B46042BC7C; Mon, 4 Mar 2019 22:52:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 032712BC75 for ; Mon, 4 Mar 2019 22:52:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726418AbfCDWwa (ORCPT ); Mon, 4 Mar 2019 17:52:30 -0500 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:53668 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726069AbfCDWwP (ORCPT ); Mon, 4 Mar 2019 17:52:15 -0500 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 308BB886BC; Tue, 5 Mar 2019 11:52:12 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1551739932; bh=VgTLA33gxM/98byFUXDRiNDTZ0s+tOCQUcCQUzsG2Cg=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=qN0UMeXZwq0x4nIj+tjpp8/4D+Uon2V3U5fBUtiZ+1EW8XCApk7mPnD03DqhOyN4G TbhB2Oc9Z6z4Q88emAA8zcF8ayGRQZWZGNas6TIO5gPkFE47kZgIYD5bb6UIjwkQSR 3DEGb/nziHkjjHJzqgKWzbPKho/qtMuG62619xYR5eDBxP3ipD/i2tdxh/aap6fEHv xkMf+pFzUbrpWL8NV11yy4vJyXfwxWshnYneXacVLFLpoVHR8YpSWAw/8/CqQxrgXe tT4wC+IoERJM0xRXPOt3HnsYdfh9HCc4/y45VvoHjGj1ZOhFR8Sy4XC8fQtwzx/YLn LH5taEOq99OBQ== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Tue, 05 Mar 2019 11:52:10 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by smtp (Postfix) with ESMTP id 3DED513ED4A; Tue, 5 Mar 2019 11:52:12 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 010571E1D96; Tue, 5 Mar 2019 11:52:11 +1300 (NZDT) From: Chris Packham To: linux@roeck-us.net, andrew@lunn.ch, gregory.clement@bootlin.com, jason@lakedaemon.net Cc: linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham , Sebastian Hesselbarth , Rob Herring , Mark Rutland , Wim Van Sebroeck , devicetree@vger.kernel.org Subject: [PATCH 2/2] watchdog: orion_wdt: use timer1 as a pretimeout Date: Tue, 5 Mar 2019 11:51:52 +1300 Message-Id: <20190304225152.26831-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190304225152.26831-1-chris.packham@alliedtelesis.co.nz> References: <20190227230707.GA28635@roeck-us.net> <20190304225152.26831-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The orion watchdog can either reset the CPU or generate an interrupt. The interrupt would be useful for debugging as it provides panic() output about the watchdog expiry, however if the interrupt is used the watchdog can't reset the CPU in the event of being stuck in a loop with interrupts disabled or if the CPU is prevented from accessing memory (e.g. an unterminated DMA). All of the orion based CPU cores (at least back as far as Kirkwood) have spare timers that aren't currently used by the Linux kernel. We can use timer1 to provide a pre-timeout ahead of the watchdog timer and provide the possibility of gathering debug before the reset triggers. Signed-off-by: Chris Packham --- arch/arm/boot/dts/armada-38x.dtsi | 1 + drivers/watchdog/orion_wdt.c | 58 ++++++++++++++++++++----------- 2 files changed, 39 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 929459c42760..fd0caa9714f2 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -376,6 +376,7 @@ reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>; clocks = <&coreclk 2>, <&refclk>; clock-names = "nbclk", "fixed"; + interrupts-extended = <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; }; cpurst: cpurst@20800 { diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index 8b259c712c52..bf1dc75c2045 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -46,6 +46,10 @@ #define WDT_AXP_FIXED_ENABLE_BIT BIT(10) #define WDT_A370_EXPIRED BIT(31) +#define TIMER1_VAL_OFF 0x001c +#define TIMER1_ENABLE_BIT BIT(2) +#define TIMER1_FIXED_ENABLE_BIT BIT(12) + static bool nowayout = WATCHDOG_NOWAYOUT; static int heartbeat = -1; /* module parameter (seconds) */ @@ -118,6 +122,7 @@ static int armada375_wdt_clock_init(struct platform_device *pdev, struct orion_watchdog *dev) { int ret; + u32 val; dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed"); if (!IS_ERR(dev->clk)) { @@ -127,9 +132,8 @@ static int armada375_wdt_clock_init(struct platform_device *pdev, return ret; } - atomic_io_modify(dev->reg + TIMER_CTRL, - WDT_AXP_FIXED_ENABLE_BIT, - WDT_AXP_FIXED_ENABLE_BIT); + val = WDT_AXP_FIXED_ENABLE_BIT | TIMER1_FIXED_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, val, val); dev->clk_rate = clk_get_rate(dev->clk); return 0; @@ -158,6 +162,7 @@ static int armadaxp_wdt_clock_init(struct platform_device *pdev, struct orion_watchdog *dev) { int ret; + u32 val; dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed"); if (IS_ERR(dev->clk)) @@ -169,38 +174,46 @@ static int armadaxp_wdt_clock_init(struct platform_device *pdev, } /* Enable the fixed watchdog clock input */ - atomic_io_modify(dev->reg + TIMER_CTRL, - WDT_AXP_FIXED_ENABLE_BIT, - WDT_AXP_FIXED_ENABLE_BIT); + val = WDT_AXP_FIXED_ENABLE_BIT | TIMER1_FIXED_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, val, val); dev->clk_rate = clk_get_rate(dev->clk); + + return 0; } static int orion_wdt_ping(struct watchdog_device *wdt_dev) { struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); + /* Reload watchdog duration */ writel(dev->clk_rate * wdt_dev->timeout, dev->reg + dev->data->wdt_counter_offset); + writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout), + dev->reg + TIMER1_VAL_OFF); + return 0; } static int armada375_start(struct watchdog_device *wdt_dev) { struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); - u32 reg; + u32 reg, val; /* Set watchdog duration */ writel(dev->clk_rate * wdt_dev->timeout, dev->reg + dev->data->wdt_counter_offset); + if (wdt_dev->pretimeout) + writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout), + dev->reg + TIMER1_VAL_OFF); /* Clear the watchdog expiration bit */ atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); /* Enable watchdog timer */ - atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, - dev->data->wdt_enable_bit); + val = dev->data->wdt_enable_bit | TIMER1_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, val, val); /* Enable reset on watchdog */ reg = readl(dev->rstout); @@ -214,7 +227,7 @@ static int armada375_start(struct watchdog_device *wdt_dev) static int armada370_start(struct watchdog_device *wdt_dev) { struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); - u32 reg; + u32 reg, val; /* Set watchdog duration */ writel(dev->clk_rate * wdt_dev->timeout, @@ -224,8 +237,8 @@ static int armada370_start(struct watchdog_device *wdt_dev) atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); /* Enable watchdog timer */ - atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, - dev->data->wdt_enable_bit); + val = dev->data->wdt_enable_bit | TIMER1_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, val, val); /* Enable reset on watchdog */ reg = readl(dev->rstout); @@ -237,14 +250,15 @@ static int armada370_start(struct watchdog_device *wdt_dev) static int orion_start(struct watchdog_device *wdt_dev) { struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); + u32 val; /* Set watchdog duration */ writel(dev->clk_rate * wdt_dev->timeout, dev->reg + dev->data->wdt_counter_offset); /* Enable watchdog timer */ - atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, - dev->data->wdt_enable_bit); + val = dev->data->wdt_enable_bit | TIMER1_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, val, val); /* Enable reset on watchdog */ atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, @@ -264,12 +278,14 @@ static int orion_wdt_start(struct watchdog_device *wdt_dev) static int orion_stop(struct watchdog_device *wdt_dev) { struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); + u32 mask; /* Disable reset on watchdog */ atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0); /* Disable watchdog timer */ - atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); + mask = dev->data->wdt_enable_bit | TIMER1_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, mask, 0); return 0; } @@ -277,7 +293,7 @@ static int orion_stop(struct watchdog_device *wdt_dev) static int armada375_stop(struct watchdog_device *wdt_dev) { struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); - u32 reg; + u32 reg, mask; /* Disable reset on watchdog */ atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, @@ -287,7 +303,8 @@ static int armada375_stop(struct watchdog_device *wdt_dev) writel(reg, dev->rstout); /* Disable watchdog timer */ - atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); + mask = dev->data->wdt_enable_bit | TIMER1_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, mask, 0); return 0; } @@ -295,7 +312,7 @@ static int armada375_stop(struct watchdog_device *wdt_dev) static int armada370_stop(struct watchdog_device *wdt_dev) { struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); - u32 reg; + u32 reg, mask; /* Disable reset on watchdog */ reg = readl(dev->rstout); @@ -303,7 +320,8 @@ static int armada370_stop(struct watchdog_device *wdt_dev) writel(reg, dev->rstout); /* Disable watchdog timer */ - atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); + mask = dev->data->wdt_enable_bit | TIMER1_ENABLE_BIT; + atomic_io_modify(dev->reg + TIMER_CTRL, mask, 0); return 0; } @@ -350,7 +368,7 @@ static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev) } static const struct watchdog_info orion_wdt_info = { - .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | WDIOF_PRETIMEOUT, .identity = "Orion Watchdog", };