Message ID | 20190812085321.13823-4-Anson.Huang@nxp.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | [V2,1/4] dt-bindings: watchdog: Add i.MX7ULP bindings | expand |
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index 6859a3a..1fdb5a35 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -264,6 +264,16 @@ #clock-cells = <1>; }; + wdog1: wdog@403d0000 { + compatible = "fsl,imx7ulp-wdt"; + reg = <0x403d0000 0x10000>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc2 IMX7ULP_CLK_WDG1>; + assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>; + assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>; + timeout-sec = <40>; + }; + pcc2: clock-controller@403f0000 { compatible = "fsl,imx7ulp-pcc2"; reg = <0x403f0000 0x10000>;