| Message ID | 20210903112101.493552-1-quic_jiles@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | watchdog: sbsa: only use 32-bit accessors | expand |
On 9/3/21 4:21 AM, Jamie Iles wrote: > SBSA says of the generic watchdog: > > All registers are 32 bits in size and should be accessed using 32-bit > reads and writes. If an access size other than 32 bits is used then > the results are IMPLEMENTATION DEFINED. > > and for qemu, the implementation will only allow 32-bit accesses > resulting in a synchronous external abort when configuring the watchdog. > Use lo_hi_* accessors rather than a readq/writeq. > > Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1") > Signed-off-by: Jamie Iles <quic_jiles@quicinc.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/sbsa_gwdt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c > index ee9ff38929eb..6f4319bdbc50 100644 > --- a/drivers/watchdog/sbsa_gwdt.c > +++ b/drivers/watchdog/sbsa_gwdt.c > @@ -130,7 +130,7 @@ static u64 sbsa_gwdt_reg_read(struct sbsa_gwdt *gwdt) > if (gwdt->version == 0) > return readl(gwdt->control_base + SBSA_GWDT_WOR); > else > - return readq(gwdt->control_base + SBSA_GWDT_WOR); > + return lo_hi_readq(gwdt->control_base + SBSA_GWDT_WOR); > } > > static void sbsa_gwdt_reg_write(u64 val, struct sbsa_gwdt *gwdt) > @@ -138,7 +138,7 @@ static void sbsa_gwdt_reg_write(u64 val, struct sbsa_gwdt *gwdt) > if (gwdt->version == 0) > writel((u32)val, gwdt->control_base + SBSA_GWDT_WOR); > else > - writeq(val, gwdt->control_base + SBSA_GWDT_WOR); > + lo_hi_writeq(val, gwdt->control_base + SBSA_GWDT_WOR); > } > > /* >
Hi Jamie， On 2021/9/3 19:21, Jamie Iles wrote: > SBSA says of the generic watchdog: > > All registers are 32 bits in size and should be accessed using 32-bit > reads and writes. If an access size other than 32 bits is used then > the results are IMPLEMENTATION DEFINED. > > and for qemu, the implementation will only allow 32-bit accesses > resulting in a synchronous external abort when configuring the watchdog. > Use lo_hi_* accessors rather than a readq/writeq. > > Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1") > Signed-off-by: Jamie Iles <quic_jiles@quicinc.com> > --- > drivers/watchdog/sbsa_gwdt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c > index ee9ff38929eb..6f4319bdbc50 100644 > --- a/drivers/watchdog/sbsa_gwdt.c > +++ b/drivers/watchdog/sbsa_gwdt.c > @@ -130,7 +130,7 @@ static u64 sbsa_gwdt_reg_read(struct sbsa_gwdt *gwdt) > if (gwdt->version == 0) > return readl(gwdt->control_base + SBSA_GWDT_WOR); > else > - return readq(gwdt->control_base + SBSA_GWDT_WOR); > + return lo_hi_readq(gwdt->control_base + SBSA_GWDT_WOR); My bad, I didn't check this carefully. Please feel free to add： Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Thanks, Shaokun > } > > static void sbsa_gwdt_reg_write(u64 val, struct sbsa_gwdt *gwdt) > @@ -138,7 +138,7 @@ static void sbsa_gwdt_reg_write(u64 val, struct sbsa_gwdt *gwdt) > if (gwdt->version == 0) > writel((u32)val, gwdt->control_base + SBSA_GWDT_WOR); > else > - writeq(val, gwdt->control_base + SBSA_GWDT_WOR); > + lo_hi_writeq(val, gwdt->control_base + SBSA_GWDT_WOR); > } > > /* >
diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c index ee9ff38929eb..6f4319bdbc50 100644 --- a/drivers/watchdog/sbsa_gwdt.c +++ b/drivers/watchdog/sbsa_gwdt.c @@ -130,7 +130,7 @@ static u64 sbsa_gwdt_reg_read(struct sbsa_gwdt *gwdt) if (gwdt->version == 0) return readl(gwdt->control_base + SBSA_GWDT_WOR); else - return readq(gwdt->control_base + SBSA_GWDT_WOR); + return lo_hi_readq(gwdt->control_base + SBSA_GWDT_WOR); } static void sbsa_gwdt_reg_write(u64 val, struct sbsa_gwdt *gwdt) @@ -138,7 +138,7 @@ static void sbsa_gwdt_reg_write(u64 val, struct sbsa_gwdt *gwdt) if (gwdt->version == 0) writel((u32)val, gwdt->control_base + SBSA_GWDT_WOR); else - writeq(val, gwdt->control_base + SBSA_GWDT_WOR); + lo_hi_writeq(val, gwdt->control_base + SBSA_GWDT_WOR); } /*
SBSA says of the generic watchdog: All registers are 32 bits in size and should be accessed using 32-bit reads and writes. If an access size other than 32 bits is used then the results are IMPLEMENTATION DEFINED. and for qemu, the implementation will only allow 32-bit accesses resulting in a synchronous external abort when configuring the watchdog. Use lo_hi_* accessors rather than a readq/writeq. Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1") Signed-off-by: Jamie Iles <quic_jiles@quicinc.com> --- drivers/watchdog/sbsa_gwdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)