@@ -382,7 +382,7 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
}
static void
-mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
+mt76_dma_init_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
{
struct mt76_queue *q = &dev->q_rx[qid];
int i;
@@ -392,6 +392,13 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
mt76_dma_rx_cleanup(dev, q);
mt76_dma_sync_idx(dev, q);
+}
+
+static void
+mt76_dma_complete_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
+{
+ struct mt76_queue *q = &dev->q_rx[qid];
+
mt76_dma_rx_fill(dev, q, false);
}
@@ -518,7 +525,8 @@ static const struct mt76_queue_ops mt76_dma_ops = {
.add_buf = mt76_dma_add_buf,
.tx_queue_skb = mt76_dma_tx_queue_skb,
.tx_cleanup = mt76_dma_tx_cleanup,
- .rx_reset = mt76_dma_rx_reset,
+ .init_rx_reset = mt76_dma_init_rx_reset,
+ .complete_rx_reset = mt76_dma_complete_rx_reset,
.kick = mt76_dma_kick_queue,
};
@@ -159,7 +159,8 @@ struct mt76_queue_ops {
void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush,
int *len, u32 *info, bool *more);
- void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
+ void (*init_rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
+ void (*complete_rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
bool flush);
@@ -552,9 +553,10 @@ static inline u16 mt76_rev(struct mt76_dev *dev)
#define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76))
#define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_add_buf(dev, ...) (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
-#define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
#define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
+#define mt76_queue_init_rx_reset(dev, ...) (dev)->mt76.queue_ops->init_rx_reset(&((dev)->mt76), __VA_ARGS__)
+#define mt76_queue_complete_rx_reset(dev, ...) (dev)->mt76.queue_ops->complete_rx_reset(&((dev)->mt76), __VA_ARGS__)
static inline struct mt76_channel_state *
mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c)
This is a preliminary patch to add XDP support to mt76 driver. In order to reset the rx dma buffers with a proper buffer_size (XDP does not support fragmented frames and requires one packet per memory page) split mt76_dma_rx_reset routine in mt76_dma_init_rx_reset where we free allocated memory and mt76_dma_complete_rx_reset used to allocate dma memory with a proper size according to the working mode (standard or xdp) Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> --- drivers/net/wireless/mediatek/mt76/dma.c | 12 ++++++++++-- drivers/net/wireless/mediatek/mt76/mt76.h | 6 ++++-- 2 files changed, 14 insertions(+), 4 deletions(-)