From patchwork Tue Apr 9 15:05:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanislaw Gruszka X-Patchwork-Id: 2415751 Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 3BAAA3FC71 for ; Tue, 9 Apr 2013 15:04:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934334Ab3DIPE4 (ORCPT ); Tue, 9 Apr 2013 11:04:56 -0400 Received: from mx4.wp.pl ([212.77.101.8]:43314 "EHLO mx4.wp.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932898Ab3DIPEz (ORCPT ); Tue, 9 Apr 2013 11:04:55 -0400 Received: (wp-smtpd smtp.wp.pl 25958 invoked from network); 9 Apr 2013 17:04:52 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wp.pl; s=1024a; t=1365519893; bh=94AhXWdMwMjRPzqYG/OY3dtKvaKOasWW+vzJiR4Uvn8=; h=From:To:Cc:Subject; b=Yp9SdRqWw1xcooR4N7YP/mms3D1+ifpVtPXWNKfKFrcdx1vNN9H0L68YOeEADrM+F aT2rJO/Pu5Pvrd0SFOw00ieBSRn+XtH9uxLf7sWcJveYxrVHuK5jdg7X4XyTnzQucK JxAHarZSIhaf4zKYQu6E7tJMo08FLLCQbHr51IwM= Received: from ip-94-112-188-158.net.upcbroadband.cz (HELO localhost) (stf_xl@wp.pl@[94.112.188.158]) (envelope-sender ) by smtp.wp.pl (WP-SMTPD) with AES128-SHA encrypted SMTP for ; 9 Apr 2013 17:04:52 +0200 From: stf_xl@wp.pl To: "John W. Linville\"" Cc: linux-wireless@vger.kernel.org, users@rt2x00.serialmonkey.com, Stanislaw Gruszka Subject: [PATCH 07/11] rt2800: add rt2800_rx_filter_calibration procedure Date: Tue, 9 Apr 2013 17:05:26 +0200 Message-Id: <1365519930-3230-8-git-send-email-stf_xl@wp.pl> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1365519930-3230-1-git-send-email-stf_xl@wp.pl> References: <1365519930-3230-1-git-send-email-stf_xl@wp.pl> X-WP-DKIM-Status: good (id: wp.pl) X-WP-AV: skaner antywirusowy poczty Wirtualnej Polski S. A. X-WP-SPAM: NO 0000000 [YfMk] Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Stanislaw Gruszka Add procedure for both bands filter calibration and use it on individual chipset init rfcsr subroutines. Signed-off-by: Stanislaw Gruszka --- drivers/net/wireless/rt2x00/rt2800lib.c | 106 +++++++++++++++++-------------- 1 files changed, 59 insertions(+), 47 deletions(-) diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 7130040..df8760f 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c @@ -4332,8 +4332,8 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) return 0; } -static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, - bool bw40, u8 rfcsr24, u8 filter_target) +static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40, + u8 filter_target) { unsigned int i; u8 bbp; @@ -4341,6 +4341,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, u8 passband; u8 stopband; u8 overtuned = 0; + u8 rfcsr24 = (bw40) ? 0x27 : 0x07; rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24); @@ -4396,6 +4397,52 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, return rfcsr24; } +static void rt2800_rx_filter_calibration(struct rt2x00_dev *rt2x00dev) +{ + struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; + u8 filter_tgt_bw20; + u8 filter_tgt_bw40; + u8 rfcsr, bbp; + + /* + * TODO: sync filter_tgt values with vendor driver + */ + if (rt2x00_rt(rt2x00dev, RT3070)) { + filter_tgt_bw20 = 0x16; + filter_tgt_bw40 = 0x19; + } else { + filter_tgt_bw20 = 0x13; + filter_tgt_bw40 = 0x15; + } + + drv_data->calibration_bw20 = + rt2800_init_rx_filter(rt2x00dev, false, filter_tgt_bw20); + drv_data->calibration_bw40 = + rt2800_init_rx_filter(rt2x00dev, true, filter_tgt_bw40); + + /* + * Save BBP 25 & 26 values for later use in channel switching (for 3052) + */ + rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); + rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); + + /* + * Set back to initial state + */ + rt2800_bbp_write(rt2x00dev, 24, 0); + + rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0); + rt2800_rfcsr_write(rt2x00dev, 22, rfcsr); + + /* + * Set BBP back to BW20 + */ + rt2800_bbp_read(rt2x00dev, 4, &bbp); + rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0); + rt2800_bbp_write(rt2x00dev, 4, bbp); +} + static void rt2800_normal_mode_setup_5xxx(struct rt2x00_dev *rt2x00dev) { u8 reg; @@ -4539,6 +4586,8 @@ static void rt2800_init_rfcsr_30xx(struct rt2x00_dev *rt2x00dev) rt2x00_set_field32(®, GPIO_SWITCH_5, 0); rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); } + + rt2800_rx_filter_calibration(rt2x00dev); } static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev) @@ -4597,6 +4646,8 @@ static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev) rt2800_rfcsr_read(rt2x00dev, 29, &rfcsr); rt2x00_set_field8(&rfcsr, RFCSR29_RSSI_GAIN, 3); rt2800_rfcsr_write(rt2x00dev, 29, rfcsr); + + rt2800_rx_filter_calibration(rt2x00dev); } static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev) @@ -4664,6 +4715,8 @@ static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev) rt2800_rfcsr_write(rt2x00dev, 61, 0x00); rt2800_rfcsr_write(rt2x00dev, 62, 0x00); rt2800_rfcsr_write(rt2x00dev, 63, 0x00); + + rt2800_rx_filter_calibration(rt2x00dev); } static void rt2800_init_rfcsr_3390(struct rt2x00_dev *rt2x00dev) @@ -4706,6 +4759,8 @@ static void rt2800_init_rfcsr_3390(struct rt2x00_dev *rt2x00dev) rt2800_register_read(rt2x00dev, GPIO_SWITCH, ®); rt2x00_set_field32(®, GPIO_SWITCH_5, 0); rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); + + rt2800_rx_filter_calibration(rt2x00dev); } static void rt2800_init_rfcsr_3572(struct rt2x00_dev *rt2x00dev) @@ -4758,6 +4813,8 @@ static void rt2800_init_rfcsr_3572(struct rt2x00_dev *rt2x00dev) rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 0); rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1); rt2800_register_write(rt2x00dev, LDO_CFG0, reg); + + rt2800_rx_filter_calibration(rt2x00dev); } static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev) @@ -4956,7 +5013,6 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) { struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; u8 rfcsr; - u8 bbp; u32 reg; if (!rt2x00_rt(rt2x00dev, RT3070) && @@ -5007,50 +5063,6 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) return 0; } - /* - * Set RX Filter calibration for 20MHz and 40MHz - */ - if (rt2x00_rt(rt2x00dev, RT3070)) { - drv_data->calibration_bw20 = - rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16); - drv_data->calibration_bw40 = - rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19); - } else if (rt2x00_rt(rt2x00dev, RT3071) || - rt2x00_rt(rt2x00dev, RT3090) || - rt2x00_rt(rt2x00dev, RT3352) || - rt2x00_rt(rt2x00dev, RT3390) || - rt2x00_rt(rt2x00dev, RT3572)) { - drv_data->calibration_bw20 = - rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x13); - drv_data->calibration_bw40 = - rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); - } - - /* - * Save BBP 25 & 26 values for later use in channel switching - */ - rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); - rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); - - if (!rt2x00_rt(rt2x00dev, RT5390) && - !rt2x00_rt(rt2x00dev, RT5392)) { - /* - * Set back to initial state - */ - rt2800_bbp_write(rt2x00dev, 24, 0); - - rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr); - rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0); - rt2800_rfcsr_write(rt2x00dev, 22, rfcsr); - - /* - * Set BBP back to BW20 - */ - rt2800_bbp_read(rt2x00dev, 4, &bbp); - rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0); - rt2800_bbp_write(rt2x00dev, 4, bbp); - } - if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F) || rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) ||