From patchwork Sun Jan 25 08:52:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Kondratiev X-Patchwork-Id: 5700791 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B0AFDC058D for ; Sun, 25 Jan 2015 08:53:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CA5F5201FB for ; Sun, 25 Jan 2015 08:53:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D997A2017E for ; Sun, 25 Jan 2015 08:53:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752692AbbAYIxi (ORCPT ); Sun, 25 Jan 2015 03:53:38 -0500 Received: from wolverine02.qualcomm.com ([199.106.114.251]:31610 "EHLO wolverine02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751642AbbAYIxc (ORCPT ); Sun, 25 Jan 2015 03:53:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1422176012; x=1453712012; h=from:cc:to:subject:date:message-id:in-reply-to: references; bh=4h6govutEllibaSLPsI0eV7IQpTyCwrdtFZIuMYWhVM=; b=B+/QbzWrORW7ZJN1xZO5oMHYPN1T84Xh6AL05fthUUZ6X8LIBGEhAo97 Ci4uWAhbz34DK6CbeiYuAST6qqjzlUIRZngXDheI+zH+L0qDDOnWUGyPn sBHrqUXJI2SSV/bZ4wH0l8nfyM506P1LMrtrFc6zHUD2VJ3NXc97aMkEn o=; X-IronPort-AV: E=McAfee;i="5600,1067,7691"; a="191850659" Received: from ironmsg02-r.qualcomm.com ([172.30.46.16]) by wolverine02.qualcomm.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 25 Jan 2015 00:53:32 -0800 From: Vladimir Kondratiev Cc: Vladimir Shulman , linux-wireless@vger.kernel.org, wil6210@qca.qualcomm.com, Vladimir Kondratiev X-IronPort-AV: E=Sophos;i="5.09,463,1418112000"; d="scan'208";a="431455912" Received: from lx-wigig-72.mea.qualcomm.com ([10.18.176.26]) by ironmsg02-R.qualcomm.com with ESMTP; 25 Jan 2015 00:53:32 -0800 To: Kalle Valo Subject: [PATCH 05/10] wil6210: tuning rings size Date: Sun, 25 Jan 2015 10:52:46 +0200 Message-Id: <1422175971-8075-6-git-send-email-qca_vkondrat@qca.qualcomm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1422175971-8075-1-git-send-email-qca_vkondrat@qca.qualcomm.com> References: <1422175971-8075-1-git-send-email-qca_vkondrat@qca.qualcomm.com> Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vladimir Shulman Tuning rings size for performance optimization. Increasing Tx ring size, allows buffering more packets for HW, thus eliminating idle periods which were observed with smaller ring at high throughput, because HW was fetching packets faster than driver was filling them into the TX ring. Rx ring was similarly increased to avoid same problems in Rx. Signed-off-by: Vladimir Shulman Signed-off-by: Vladimir Kondratiev --- drivers/net/wireless/ath/wil6210/wil6210.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/wireless/ath/wil6210/wil6210.h b/drivers/net/wireless/ath/wil6210/wil6210.h index fc196bf..2521ba1 100644 --- a/drivers/net/wireless/ath/wil6210/wil6210.h +++ b/drivers/net/wireless/ath/wil6210/wil6210.h @@ -45,8 +45,8 @@ static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) #define WIL6210_MEM_SIZE (2*1024*1024UL) #define WIL_TX_Q_LEN_DEFAULT (4000) -#define WIL_RX_RING_SIZE_ORDER_DEFAULT (9) -#define WIL_TX_RING_SIZE_ORDER_DEFAULT (9) +#define WIL_RX_RING_SIZE_ORDER_DEFAULT (10) +#define WIL_TX_RING_SIZE_ORDER_DEFAULT (10) /* limit ring size in range [32..32k] */ #define WIL_RING_SIZE_ORDER_MIN (5) #define WIL_RING_SIZE_ORDER_MAX (15)