From patchwork Wed Mar 11 15:11:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arend van Spriel X-Patchwork-Id: 5986321 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id F3A0EBF90F for ; Wed, 11 Mar 2015 15:11:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 30C452037F for ; Wed, 11 Mar 2015 15:11:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 13A522037C for ; Wed, 11 Mar 2015 15:11:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751994AbbCKPLk (ORCPT ); Wed, 11 Mar 2015 11:11:40 -0400 Received: from mail-gw1-out.broadcom.com ([216.31.210.62]:2362 "EHLO mail-gw1-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750848AbbCKPLi (ORCPT ); Wed, 11 Mar 2015 11:11:38 -0400 X-IronPort-AV: E=Sophos;i="5.11,382,1422950400"; d="scan'208";a="59330530" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw1-out.broadcom.com with ESMTP; 11 Mar 2015 08:14:17 -0700 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Wed, 11 Mar 2015 08:11:37 -0700 Received: from mail-sj1-12.sj.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.174.1; Wed, 11 Mar 2015 08:11:36 -0700 Received: from lb-bun-235.bun.broadcom.com (lb-bun-235.bun.broadcom.com [10.176.8.235]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id E258E27A83; Wed, 11 Mar 2015 08:11:36 -0700 (PDT) Received: from arend by lb-bun-235.bun.broadcom.com with local (Exim 4.82) (envelope-from ) id 1YViIJ-0003ch-KB; Wed, 11 Mar 2015 16:11:35 +0100 From: Arend van Spriel To: Kalle Valo CC: linux-wireless , Arend van Spriel Subject: [PATCH 2/7] brcmfmac: always perform cores checks Date: Wed, 11 Mar 2015 16:11:28 +0100 Message-ID: <1426086693-13876-3-git-send-email-arend@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1426086693-13876-1-git-send-email-arend@broadcom.com> References: <1426086693-13876-1-git-send-email-arend@broadcom.com> MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Instead of checking the cores in the chip only if CONFIG_BRCMDBG is selected perform the check always and extend it with more sanity checking. Reviewed-by: Hante Meuleman Reviewed-by: Pieter-Paul Giesberts Signed-off-by: Arend van Spriel --- drivers/net/wireless/brcm80211/brcmfmac/chip.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/net/wireless/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/brcm80211/brcmfmac/chip.c index e679edc..cb08f4e 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/chip.c +++ b/drivers/net/wireless/brcm80211/brcmfmac/chip.c @@ -419,13 +419,13 @@ static struct brcmf_core *brcmf_chip_add_core(struct brcmf_chip_priv *ci, return &core->pub; } -#ifdef DEBUG /* safety check for chipinfo */ static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) { struct brcmf_core_priv *core; bool need_socram = false; bool has_socram = false; + bool cpu_found = false; int idx = 1; list_for_each_entry(core, &ci->cores, list) { @@ -435,12 +435,14 @@ static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) switch (core->pub.id) { case BCMA_CORE_ARM_CM3: + cpu_found = true; need_socram = true; break; case BCMA_CORE_INTERNAL_MEM: has_socram = true; break; case BCMA_CORE_ARM_CR4: + cpu_found = true; if (ci->pub.rambase == 0) { brcmf_err("RAM base not provided with ARM CR4 core\n"); return -ENOMEM; @@ -451,19 +453,21 @@ static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) } } + if (!cpu_found) { + brcmf_err("CPU core not detected\n"); + return -ENXIO; + } /* check RAM core presence for ARM CM3 core */ if (need_socram && !has_socram) { brcmf_err("RAM core not provided with ARM CM3 core\n"); return -ENODEV; } + if (!ci->pub.ramsize) { + brcmf_err("RAM size is undetermined\n"); + return -ENOMEM; + } return 0; } -#else /* DEBUG */ -static inline int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) -{ - return 0; -} -#endif static void brcmf_chip_get_raminfo(struct brcmf_chip_priv *ci) {