From patchwork Tue Mar 31 18:16:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Oh X-Patchwork-Id: 6133271 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4AAD29F32E for ; Tue, 31 Mar 2015 18:17:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 55D91201BB for ; Tue, 31 Mar 2015 18:17:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4CE63201B4 for ; Tue, 31 Mar 2015 18:17:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754118AbbCaSRs (ORCPT ); Tue, 31 Mar 2015 14:17:48 -0400 Received: from wolverine02.qualcomm.com ([199.106.114.251]:61697 "EHLO wolverine02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753989AbbCaSRq (ORCPT ); Tue, 31 Mar 2015 14:17:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1427825867; x=1459361867; h=from:to:cc:subject:date:message-id:mime-version; bh=U1OCUx8ZlyIWsOMvWapTmSfY3MqJx7wLEcFcy+vANVk=; b=phDqqyX4QR7PfxfKBK2Y4BcGTK1Hpeuuqep63dTiepOpxD2kEN8pcuWy O2tf0LoWpObCoNLQbL/5dKxdtAVf3bWOTkKRDsWwOxd4yJIL95oKjSnn6 xtSIRKku8AXNyaajYzEj3g0SfRPnYE/VIzU7JOXuvfhGf7eBftkX8jAUf Y=; X-IronPort-AV: E=McAfee;i="5700,7163,7757"; a="203345402" Received: from ironmsg01-lv.qualcomm.com ([10.47.202.180]) by wolverine02.qualcomm.com with ESMTP; 31 Mar 2015 11:17:46 -0700 X-IronPort-AV: E=Sophos;i="5.11,502,1422950400"; d="scan'208";a="32747632" Received: from nasanexm01b.na.qualcomm.com ([10.85.0.82]) by ironmsg01-lv.qualcomm.com with ESMTP/TLS/RC4-SHA; 31 Mar 2015 11:17:44 -0700 Received: from poh-linux2.qualcomm.com (10.80.80.8) by NASANEXM01B.na.qualcomm.com (10.85.0.82) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Tue, 31 Mar 2015 11:17:37 -0700 From: Peter Oh To: CC: Subject: [PATCH 1/2] ath: define JP DFS patterns separated from FCC Date: Tue, 31 Mar 2015 11:16:24 -0700 Message-ID: <1427825785-21389-1-git-send-email-poh@qca.qualcomm.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: NASANEXM01F.na.qualcomm.com (10.85.0.32) To NASANEXM01B.na.qualcomm.com (10.85.0.82) Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Separate Japan's DFS pattern from FCC to control PPB threshold. Currently all the radar detectors use the same threshold rate at 50%, but it's not able to achieve if data traffic rate is higher than 40% because WLAN baseband used by ath9k and ath10k often fails detecting radar pulses, so that SW cannot get enough radar reports to achieve the rate. Since Japan's W53 band requires 50% data traffic during its DFS test we need to apply different threshold rate than others on it. Hence define its own pattern to give flexibility to threshold rate. Signed-off-by: Peter Oh --- drivers/net/wireless/ath/dfs_pattern_detector.c | 27 ++++++++++++++++--------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/net/wireless/ath/dfs_pattern_detector.c b/drivers/net/wireless/ath/dfs_pattern_detector.c index b1de8c6..8d1e082 100644 --- a/drivers/net/wireless/ath/dfs_pattern_detector.c +++ b/drivers/net/wireless/ath/dfs_pattern_detector.c @@ -42,6 +42,7 @@ struct radar_types { /* percentage on ppb threshold to trigger detection */ #define MIN_PPB_THRESH 50 #define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100) +#define PPB_THRESH_JP(PPB, RATE) ((PPB * RATE + 100 - RATE) / 100) #define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF) /* percentage of pulse width tolerance */ #define WIDTH_TOLERANCE 5 @@ -96,17 +97,23 @@ static const struct radar_types fcc_radar_types = { .radar_types = fcc_radar_ref_types, }; -#define JP_PATTERN FCC_PATTERN +#define JP_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB, RATE, CHIRP) \ +{ \ + ID, WIDTH_LOWER(WMIN), WIDTH_UPPER(WMAX), \ + PMIN - PRI_TOLERANCE, \ + PMAX * PRF + PRI_TOLERANCE, PRF, PPB * PRF, \ + PPB_THRESH_JP(PPB, RATE), PRI_TOLERANCE, CHIRP \ +} static const struct radar_detector_specs jp_radar_ref_types[] = { - JP_PATTERN(0, 0, 1, 1428, 1428, 1, 18, false), - JP_PATTERN(1, 2, 3, 3846, 3846, 1, 18, false), - JP_PATTERN(2, 0, 1, 1388, 1388, 1, 18, false), - JP_PATTERN(3, 1, 2, 4000, 4000, 1, 18, false), - JP_PATTERN(4, 0, 5, 150, 230, 1, 23, false), - JP_PATTERN(5, 6, 10, 200, 500, 1, 16, false), - JP_PATTERN(6, 11, 20, 200, 500, 1, 12, false), - JP_PATTERN(7, 50, 100, 1000, 2000, 1, 20, false), - JP_PATTERN(5, 0, 1, 333, 333, 1, 9, false), + JP_PATTERN(0, 0, 1, 1428, 1428, 1, 18, 50, false), + JP_PATTERN(1, 2, 3, 3846, 3846, 1, 18, 50, false), + JP_PATTERN(2, 0, 1, 1388, 1388, 1, 18, 50, false), + JP_PATTERN(3, 1, 2, 4000, 4000, 1, 18, 50, false), + JP_PATTERN(4, 0, 5, 150, 230, 1, 23, 50, false), + JP_PATTERN(5, 6, 10, 200, 500, 1, 16, 50, false), + JP_PATTERN(6, 11, 20, 200, 500, 1, 12, 50, false), + JP_PATTERN(7, 50, 100, 1000, 2000, 1, 20, 50, false), + JP_PATTERN(5, 0, 1, 333, 333, 1, 9, 50, false), }; static const struct radar_types jp_radar_types = {