From patchwork Tue Jul 7 16:47:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Oh X-Patchwork-Id: 6735431 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D3B08C05AC for ; Tue, 7 Jul 2015 16:51:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0ACEC206F7 for ; Tue, 7 Jul 2015 16:51:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0F1A7206E5 for ; Tue, 7 Jul 2015 16:51:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757868AbbGGQvO (ORCPT ); Tue, 7 Jul 2015 12:51:14 -0400 Received: from sabertooth01.qualcomm.com ([65.197.215.72]:1352 "EHLO sabertooth01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757487AbbGGQvJ (ORCPT ); Tue, 7 Jul 2015 12:51:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1436287870; x=1467823870; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=LXRXoE4cELYRRQW0rq4id+W8IdLhMjDue/mMZ/0eJtw=; b=KlnhV71Ct/Q1EhTwsFDS6h/8V5zmtX3vkYRdHFUQ9VHEmwNxF3fcXp+I 4uLRGytvDCf6ZaGdE17GdeHIWLW0dt85naHYPfX09580YRpqc/1dazQgJ 8n8lyfae2ITdWQz2kiM+yXamulxsmHIm9v2OHZrpzp0rZa5xfhPTzh6Ik 4=; X-IronPort-AV: E=McAfee;i="5700,7163,7855"; a="92197450" Received: from ironmsg03-r.qualcomm.com ([172.30.46.17]) by sabertooth01.qualcomm.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 07 Jul 2015 09:51:09 -0700 X-IronPort-AV: E=Sophos;i="5.15,424,1432623600"; d="scan'208";a="955650523" Received: from nasanexm01b.na.qualcomm.com ([10.85.0.82]) by Ironmsg03-R.qualcomm.com with ESMTP/TLS/RC4-SHA; 07 Jul 2015 09:50:24 -0700 Received: from poh-linux2.qualcomm.com (10.80.80.8) by NASANEXM01B.na.qualcomm.com (10.85.0.82) with Microsoft SMTP Server (TLS) id 15.0.1076.9; Tue, 7 Jul 2015 09:49:12 -0700 From: Peter Oh To: CC: Subject: [PATCH 2/3] ath10k: redefine rx_ppdu_end_common structure to cover qca99x0 Date: Tue, 7 Jul 2015 09:47:55 -0700 Message-ID: <1436287676-25767-3-git-send-email-poh@qca.qualcomm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436287676-25767-1-git-send-email-poh@qca.qualcomm.com> References: <1436287676-25767-1-git-send-email-poh@qca.qualcomm.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: NASANEXM01C.na.qualcomm.com (10.85.0.83) To NASANEXM01B.na.qualcomm.com (10.85.0.82) Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP rx_ppdu_end_common structure is valid for both of qca998x and qca6174, but not for qca99x0 since it has new additional members. Hence update the common structure to cover qca99x0 as well. Signed-off-by: Peter Oh --- drivers/net/wireless/ath/ath10k/rx_desc.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/ath/ath10k/rx_desc.h b/drivers/net/wireless/ath/ath10k/rx_desc.h index 492b5a5..6cb078d 100644 --- a/drivers/net/wireless/ath/ath10k/rx_desc.h +++ b/drivers/net/wireless/ath/ath10k/rx_desc.h @@ -891,13 +891,13 @@ struct rx_ppdu_end_common { __le32 evm_p15; __le32 tsf_timestamp; __le32 wb_timestamp; - u8 locationing_timestamp; - u8 phy_err_code; - __le16 flags; /* %RX_PPDU_END_FLAGS_ */ - __le32 info0; /* %RX_PPDU_END_INFO0_ */ } __packed; struct rx_ppdu_end_qca988x { + u8 locationing_timestamp; + u8 phy_err_code; + __le16 flags; /* %RX_PPDU_END_FLAGS_ */ + __le32 info0; /* %RX_PPDU_END_INFO0_ */ __le16 bb_length; __le16 info1; /* %RX_PPDU_END_INFO1_ */ } __packed; @@ -909,6 +909,10 @@ struct rx_ppdu_end_qca988x { #define RX_PPDU_END_RTT_NORMAL_MODE BIT(31) struct rx_ppdu_end_qca6174 { + u8 locationing_timestamp; + u8 phy_err_code; + __le16 flags; /* %RX_PPDU_END_FLAGS_ */ + __le32 info0; /* %RX_PPDU_END_INFO0_ */ __le32 rtt; /* %RX_PPDU_END_RTT_ */ __le16 bb_length; __le16 info1; /* %RX_PPDU_END_INFO1_ */