From patchwork Thu Apr 28 14:45:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helmut Schaa X-Patchwork-Id: 8971371 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EA1ECBF29F for ; Thu, 28 Apr 2016 14:46:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B234D202F8 for ; Thu, 28 Apr 2016 14:46:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 94E08202BE for ; Thu, 28 Apr 2016 14:46:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752205AbcD1OqE (ORCPT ); Thu, 28 Apr 2016 10:46:04 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:34092 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751801AbcD1OqD (ORCPT ); Thu, 28 Apr 2016 10:46:03 -0400 Received: by mail-wm0-f65.google.com with SMTP id n129so14750222wmn.1 for ; Thu, 28 Apr 2016 07:46:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=tIrgY25Q1kvZyTQCamvK2eGvoaRs0at4YbE9tVa48Rs=; b=NRL0z5mN/OvkCVromrnOfsentj/fcg+vwDtXgnrmHkf+ykWU1Dh8AfnhsYWJvty+55 kCFwXnyT6uYCb3Zh+cI4/5nUXb3GP01Hx9snJuQnjUV2e3Rfd4asDUsTtaB0IOr7Ya6z GG3+e3tGgLsxr5qrzGuN6ZK+BiPyt9AWcAcwS1Er2BWF/S4kynxMS9iSMtvbn6N7bha5 WS4oOv5e1/lrhCuEr8NSw6Ip3+lSIQOr6cRj8S/mTrMyCsz5L0JmWGi96gkbqN+GSTkw FnE/VegiKeb1ocC07Bqy/MY6+rqAaWIwt/P1Ff0Wvwbq0MF8Qu1xUc622f7vJN/5xqQF /Qig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=tIrgY25Q1kvZyTQCamvK2eGvoaRs0at4YbE9tVa48Rs=; b=W6ShZ5xo6F7Me7Zo1PdvxSUj1ScqCWJaDwOdywqzOmifDJx1F0M1fY0mom7jzbxZGz Qbt+WQJBowc/U3yLx6ga4TREpzdWe0QRvHqn8Hs+cxrgaLqmQRy+siFpSnxBYOydoeHG GHXwMNrGxv/0NmFzDX6c/WM/LAt0eW0PZZ2vaO0yLUcPvN/WOo+19MRqg7Ohm976sF7S J/KPnL1ArGABAMpsXQvfVyNGMzgKoU7NQhTiOezD0mOhmxmTAh8J6XGRkhHZKTURGGNY 4jnsNbAOFip6vscopOKp8u5H6Ms2i2/TDU+zX5bsASj8XIHmYVLt2MFsmlwFrJPnxv4R taag== X-Gm-Message-State: AOPr4FWGV/l+WtP971BKiktMxQWl9Lq0P3BBekbnqUZYJiDvdbtkAfttrL4rwrG2jgoY5A== X-Received: by 10.194.134.73 with SMTP id pi9mr15611753wjb.156.1461854760527; Thu, 28 Apr 2016 07:46:00 -0700 (PDT) Received: from hschaa-desktop.site ([5.158.136.57]) by smtp.gmail.com with ESMTPSA id 63sm1645341wmz.5.2016.04.28.07.45.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 28 Apr 2016 07:45:59 -0700 (PDT) From: Helmut Schaa To: linux-wireless@vger.kernel.org Cc: ath9k-devel@lists.ath9k.org, kvalo@qca.qualcomm.com, ath9k-devel@qca.qualcomm.com, Helmut Schaa Subject: [PATCH 1/3] ath9k: reuse ar9003_hw_tx_power_regwrite for tx99 setup Date: Thu, 28 Apr 2016 16:45:04 +0200 Message-Id: <1461854706-10494-1-git-send-email-helmut.schaa@googlemail.com> X-Mailer: git-send-email 2.8.1 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The same functionality as ar9003_hw_tx_power_regwrite is hardcoded in ar9003_hw_tx99_set_txpower. Just reuse the existing ar9003_hw_tx_power_regwrite for TX99 setup too. Signed-off-by: Helmut Schaa --- drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 2 +- drivers/net/wireless/ath/ath9k/ar9003_eeprom.h | 1 + drivers/net/wireless/ath/ath9k/ar9003_phy.c | 60 ++------------------------ 3 files changed, 5 insertions(+), 58 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index f680982..dec1a31 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c @@ -4402,7 +4402,7 @@ static void ar9003_hw_selfgen_tpc_txpower(struct ath_hw *ah, } /* Set tx power registers to array of values passed in */ -static int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray) +int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray) { #define POW_SM(_r, _s) (((_r) & 0x3f) << (_s)) /* make sure forced gain is not set */ diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h index 694ca2e..107bcfb 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h @@ -355,5 +355,6 @@ unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah, struct ath9k_channel *chan); void ar9003_hw_internal_regulator_apply(struct ath_hw *ah); +int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray); #endif diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index be14a8e..2f15cbc 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -17,6 +17,7 @@ #include #include "hw.h" #include "ar9003_phy.h" +#include "ar9003_eeprom.h" #define AR9300_OFDM_RATES 8 #define AR9300_HT_SS_RATES 8 @@ -1840,7 +1841,7 @@ static void ar9003_hw_tx99_stop(struct ath_hw *ah) static void ar9003_hw_tx99_set_txpower(struct ath_hw *ah, u8 txpower) { - static s16 p_pwr_array[ar9300RateSize] = { 0 }; + static u8 p_pwr_array[ar9300RateSize] = { 0 }; unsigned int i; if (txpower <= MAX_RATE_POWER) { @@ -1851,62 +1852,7 @@ static void ar9003_hw_tx99_set_txpower(struct ath_hw *ah, u8 txpower) p_pwr_array[i] = MAX_RATE_POWER; } - REG_WRITE(ah, 0xa458, 0); - - REG_WRITE(ah, 0xa3c0, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 0)); - REG_WRITE(ah, 0xa3c4, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_54], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_48], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_36], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 0)); - REG_WRITE(ah, 0xa3c8, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 0)); - REG_WRITE(ah, 0xa3cc, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11S], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11L], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_5S], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 0)); - REG_WRITE(ah, 0xa3d0, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_5], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_4], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_1_3_9_11_17_19], 8)| - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_0_8_16], 0)); - REG_WRITE(ah, 0xa3d4, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_13], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_12], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_7], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_6], 0)); - REG_WRITE(ah, 0xa3e4, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_21], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_20], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_15], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_14], 0)); - REG_WRITE(ah, 0xa3e8, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_23], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_22], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_23], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_22], 0)); - REG_WRITE(ah, 0xa3d8, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_5], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_4], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_1_3_9_11_17_19], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_0_8_16], 0)); - REG_WRITE(ah, 0xa3dc, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_13], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_12], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_7], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_6], 0)); - REG_WRITE(ah, 0xa3ec, - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_21], 24) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_20], 16) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_15], 8) | - ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_14], 0)); + ar9003_hw_tx_power_regwrite(ah, p_pwr_array); } static void ar9003_hw_init_txpower_cck(struct ath_hw *ah, u8 *rate_array)