| Message ID | 1542007730-47284-8-git-send-email-chi-hsien.lin@cypress.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Kalle Valo |
| Headers | show |
| Series | brcmfmac: chip related changes | expand |
On 11/12/2018 8:29 AM, Chi-Hsien Lin wrote: > Use sr_eng_en bit to check 4373 sr support. > > Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com> > Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com> > --- > drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c > index a8d3b96b727f..08d5173d000c 100644 > --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c > +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c > @@ -1365,6 +1365,11 @@ bool brcmf_chip_sr_capable(struct brcmf_chip *pub) > addr = CORE_CC_REG(base, sr_control1); > reg = chip->ops->read32(chip->ctx, addr); > return reg != 0; > + case CY_CC_4373_CHIP_ID: > + /* explicitly check SR engine enable bit */ > + addr = CORE_CC_REG(base, sr_control0); > + reg = chip->ops->read32(chip->ctx, addr); > + return (reg & BIT(0)) != 0; Sorry for not saying it earlier, but maybe it is good to add define of SR engine enable bit in brcm80211/include/chipcommon.h. Regards, Arend
On 11/12/2018 6:30, Arend van Spriel wrote: > On 11/12/2018 8:29 AM, Chi-Hsien Lin wrote: >> Use sr_eng_en bit to check 4373 sr support. >> >> Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com> >> Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com> >> --- >> drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c >> b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c >> index a8d3b96b727f..08d5173d000c 100644 >> --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c >> +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c >> @@ -1365,6 +1365,11 @@ bool brcmf_chip_sr_capable(struct brcmf_chip *pub) >> addr = CORE_CC_REG(base, sr_control1); >> reg = chip->ops->read32(chip->ctx, addr); >> return reg != 0; >> + case CY_CC_4373_CHIP_ID: >> + /* explicitly check SR engine enable bit */ >> + addr = CORE_CC_REG(base, sr_control0); >> + reg = chip->ops->read32(chip->ctx, addr); >> + return (reg & BIT(0)) != 0; > > Sorry for not saying it earlier, but maybe it is good to add define of > SR engine enable bit in brcm80211/include/chipcommon.h. No problem. I'll make this change and submit V3 shortly. > > Regards, > Arend > . >
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c index a8d3b96b727f..08d5173d000c 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c @@ -1365,6 +1365,11 @@ bool brcmf_chip_sr_capable(struct brcmf_chip *pub) addr = CORE_CC_REG(base, sr_control1); reg = chip->ops->read32(chip->ctx, addr); return reg != 0; + case CY_CC_4373_CHIP_ID: + /* explicitly check SR engine enable bit */ + addr = CORE_CC_REG(base, sr_control0); + reg = chip->ops->read32(chip->ctx, addr); + return (reg & BIT(0)) != 0; case CY_CC_43012_CHIP_ID: addr = CORE_CC_REG(pmu->base, retention_ctl); reg = chip->ops->read32(chip->ctx, addr);