From patchwork Thu Jul 25 02:53:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Chuang X-Patchwork-Id: 11057865 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 86B021398 for ; Thu, 25 Jul 2019 02:54:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 780E3288EA for ; Thu, 25 Jul 2019 02:54:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6CB86288EC; Thu, 25 Jul 2019 02:54:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DE4D1288F3 for ; Thu, 25 Jul 2019 02:54:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389441AbfGYCye (ORCPT ); Wed, 24 Jul 2019 22:54:34 -0400 Received: from rtits2.realtek.com ([211.75.126.72]:60788 "EHLO rtits2.realtek.com.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389431AbfGYCyd (ORCPT ); Wed, 24 Jul 2019 22:54:33 -0400 Authenticated-By: X-SpamFilter-By: BOX Solutions SpamTrap 5.62 with qID x6P2sOaU010428, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (RTITCASV01.realtek.com.tw[172.21.6.18]) by rtits2.realtek.com.tw (8.15.2/2.57/5.78) with ESMTPS id x6P2sOaU010428 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 25 Jul 2019 10:54:24 +0800 Received: from localhost.localdomain (172.21.68.126) by RTITCASV01.realtek.com.tw (172.21.6.18) with Microsoft SMTP Server id 14.3.439.0; Thu, 25 Jul 2019 10:54:23 +0800 From: To: CC: , , Subject: [PATCH v2 2/5] rtw88: check efuse for BT FT S1 Date: Thu, 25 Jul 2019 10:53:28 +0800 Message-ID: <1564023211-3138-3-git-send-email-yhchuang@realtek.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564023211-3138-1-git-send-email-yhchuang@realtek.com> References: <1564023211-3138-1-git-send-email-yhchuang@realtek.com> MIME-Version: 1.0 X-Originating-IP: [172.21.68.126] Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yan-Hsuan Chuang Some modules might not have full programed efuse. Driver should check the BT FT S1 type to know that if BT has been programed. If BT is not programed, throw a warning to notify that this module is not capable of working with WiFi + BT concurrently. Signed-off-by: Yan-Hsuan Chuang --- v1 -> v2 no change drivers/net/wireless/realtek/rtw88/efuse.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/net/wireless/realtek/rtw88/efuse.c b/drivers/net/wireless/realtek/rtw88/efuse.c index 66e56f3..82aa26a 100644 --- a/drivers/net/wireless/realtek/rtw88/efuse.c +++ b/drivers/net/wireless/realtek/rtw88/efuse.c @@ -8,6 +8,11 @@ #include "debug.h" #define RTW_EFUSE_BANK_WIFI 0x0 +#define RTW_EFUSE_BANK_BT 0x1 + +#define EFUSE_BT_S1_ADDR 0x4a +#define EFUSE_BT_S1_TYPE1 0xff +#define EFUSE_BT_S1_TYPE2 0x00 static void switch_efuse_bank(struct rtw_dev *rtwdev, u8 efuse_bank) { @@ -89,6 +94,7 @@ static int rtw_dump_physical_efuse_map(struct rtw_dev *rtwdev, u8 *map) u32 efuse_ctl; u32 addr; u32 cnt; + u8 ft_ver; switch_efuse_bank(rtwdev, RTW_EFUSE_BANK_WIFI); @@ -113,6 +119,24 @@ static int rtw_dump_physical_efuse_map(struct rtw_dev *rtwdev, u8 *map) *(map + addr) = (u8)(efuse_ctl & BIT_MASK_EF_DATA); } + /* verify BT FT S1 efuse type */ + switch_efuse_bank(rtwdev, RTW_EFUSE_BANK_BT); + + efuse_ctl = rtw_read32(rtwdev, REG_EFUSE_CTRL); + efuse_ctl &= ~(BIT_MASK_EF_DATA | BITS_EF_ADDR); + efuse_ctl |= (EFUSE_BT_S1_ADDR & BIT_MASK_EF_ADDR) << BIT_SHIFT_EF_ADDR; + rtw_write32(rtwdev, REG_EFUSE_CTRL, efuse_ctl & (~BIT_EF_FLAG)); + + if (!check_hw_ready(rtwdev, REG_EFUSE_CTRL, BIT_EF_FLAG, 0x1)) { + rtw_err(rtwdev, "failed to read BT efuse\n"); + return -EBUSY; + } + + efuse_ctl = rtw_read32(rtwdev, REG_EFUSE_CTRL); + ft_ver = (u8)(efuse_ctl & BIT_MASK_EF_DATA); + if (ft_ver == EFUSE_BT_S1_TYPE1 || ft_ver == EFUSE_BT_S1_TYPE2) + rtw_warn(rtwdev, "BT S1 not calibrated, not recommended to verify BT for this module\n"); + return 0; }