@@ -633,6 +633,7 @@ struct ath10k_vif {
u8 rate_ctrl[ATH10K_TID_MAX];
u32 rate_code[ATH10K_TID_MAX];
int rtscts[ATH10K_TID_MAX];
+ u32 tids_rst;
};
struct ath10k_vif_iter {
@@ -6689,6 +6689,7 @@ static int ath10k_sta_set_txpwr(struct ieee80211_hw *hw,
struct ath10k_mac_iter_tid_conf_data {
struct ieee80211_vif *curr_vif;
struct ath10k *ar;
+ bool reset_config;
};
static bool
@@ -7071,6 +7072,54 @@ static int ath10k_mac_set_tid_config(struct ath10k *ar, struct ieee80211_sta *st
return ret;
}
+static int ath10k_mac_reset_tid_config(struct ath10k *ar,
+ struct ieee80211_sta *sta,
+ struct ath10k_vif *arvif,
+ u8 tids)
+{
+ struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
+ struct wmi_per_peer_per_tid_cfg_arg arg;
+ int ret = 0, i = 0;
+
+ arg.vdev_id = arvif->vdev_id;
+ while (i < ATH10K_TID_MAX) {
+ if (!(tids & BIT(i))) {
+ i++;
+ continue;
+ }
+
+ arg.tid = i;
+ arg.ack_policy = WMI_PEER_TID_CONFIG_ACK;
+ arg.retry_count = ATH10K_MAX_RETRY_COUNT;
+ arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;
+ arg.aggr_control = WMI_TID_CONFIG_AGGR_CONTROL_ENABLE;
+ arg.rtscts_ctrl = WMI_TID_CONFIG_RTSCTS_CONTROL_ENABLE;
+ arg.ext_tid_cfg_bitmap = WMI_EXT_TID_RTS_CTS_CONFIG;
+ ether_addr_copy(arg.peer_macaddr.addr, sta->addr);
+ ret = ath10k_wmi_set_per_peer_per_tid_cfg(ar, &arg);
+ if (ret)
+ return ret;
+
+ if (!arvif->tids_rst) {
+ arsta->retry_long[i] = -1;
+ arsta->noack[i] = -1;
+ arsta->ampdu[i] = -1;
+ arsta->rate_code[i] = -1;
+ arsta->rate_ctrl[i] = 0;
+ arsta->rtscts[i] = -1;
+ } else {
+ arvif->retry_long[i] = 0;
+ arvif->noack[i] = 0;
+ arvif->ampdu[i] = 0;
+ arvif->rate_code[i] = 0;
+ arvif->rate_ctrl[i] = 0;
+ arvif->rtscts[i] = 0;
+ }
+ i++;
+ }
+ return ret;
+}
+
static void ath10k_sta_tid_cfg_wk(struct work_struct *wk)
{
struct wmi_per_peer_per_tid_cfg_arg arg = {};
@@ -7089,6 +7138,12 @@ static void ath10k_sta_tid_cfg_wk(struct work_struct *wk)
mutex_lock(&ar->conf_mutex);
+ if (arvif->tids_rst) {
+ ret = ath10k_mac_reset_tid_config(ar, sta, arvif,
+ arvif->tids_rst);
+ goto exit;
+ }
+
ether_addr_copy(arg.peer_macaddr.addr, sta->addr);
for (i = 0; i < ATH10K_TID_MAX; i++) {
config_apply = false;
@@ -7177,6 +7232,7 @@ static void ath10k_sta_tid_cfg_wk(struct work_struct *wk)
arg.rcode_flags = 0;
}
+exit:
mutex_unlock(&ar->conf_mutex);
}
@@ -9078,6 +9134,7 @@ static int ath10k_mac_op_set_tid_config(struct ieee80211_hw *hw,
mutex_lock(&ar->conf_mutex);
arg.vdev_id = arvif->vdev_id;
+ arvif->tids_rst = 0;
memset(arvif->tid_conf_changed, 0, sizeof(arvif->tid_conf_changed));
for (i = 0; i < tid_config->n_tid_conf; i++) {
@@ -9092,6 +9149,7 @@ static int ath10k_mac_op_set_tid_config(struct ieee80211_hw *hw,
goto exit;
ret = 0;
+ arvif->tids_rst = 0;
data.curr_vif = vif;
data.ar = ar;
@@ -9103,6 +9161,35 @@ static int ath10k_mac_op_set_tid_config(struct ieee80211_hw *hw,
return ret;
}
+static int ath10k_mac_op_reset_tid_config(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta,
+ u8 tids)
+{
+ struct ath10k_vif *arvif = (void *)vif->drv_priv;
+ struct ath10k_mac_iter_tid_conf_data data = {};
+ struct ath10k *ar = hw->priv;
+ int ret = 0;
+
+ mutex_lock(&ar->conf_mutex);
+
+ if (sta) {
+ arvif->tids_rst = 0;
+ ret = ath10k_mac_reset_tid_config(ar, sta, arvif, tids);
+ goto exit;
+ }
+
+ arvif->tids_rst = tids;
+ data.curr_vif = vif;
+ data.ar = ar;
+ ieee80211_iterate_stations_atomic(hw, ath10k_mac_vif_stations_tid_conf,
+ &data);
+
+exit:
+ mutex_unlock(&ar->conf_mutex);
+ return ret;
+}
+
static const struct ieee80211_ops ath10k_ops = {
.tx = ath10k_mac_op_tx,
.wake_tx_queue = ath10k_mac_op_wake_tx_queue,
@@ -9147,6 +9234,7 @@ static int ath10k_mac_op_set_tid_config(struct ieee80211_hw *hw,
.sta_pre_rcu_remove = ath10k_mac_op_sta_pre_rcu_remove,
.sta_statistics = ath10k_sta_statistics,
.set_tid_config = ath10k_mac_op_set_tid_config,
+ .reset_tid_config = ath10k_mac_op_reset_tid_config,
CFG80211_TESTMODE_CMD(ath10k_tm_cmd)
Add ops for reset_tid_config to support reset TID configuration. This send default configuration to the target for the TIDs and stores default value in the host. Tested-on: QCA9984 hw1.0 PCI 10.4-3.9.0.2-00021 Signed-off-by: Tamizh Chelvam <tamizhr@codeaurora.org> --- drivers/net/wireless/ath/ath10k/core.h | 1 + drivers/net/wireless/ath/ath10k/mac.c | 88 ++++++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+)