From patchwork Tue Nov 23 18:50:16 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Kossifidis X-Patchwork-Id: 350211 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oANIwFUd004920 for ; Tue, 23 Nov 2010 19:00:21 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755426Ab0KWSur (ORCPT ); Tue, 23 Nov 2010 13:50:47 -0500 Received: from mail-ey0-f174.google.com ([209.85.215.174]:52337 "EHLO mail-ey0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754506Ab0KWSuq (ORCPT ); Tue, 23 Nov 2010 13:50:46 -0500 Received: by eye27 with SMTP id 27so4867549eye.19 for ; Tue, 23 Nov 2010 10:50:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:date:from:to:cc:subject :message-id:mail-followup-to:mime-version:content-type :content-disposition:user-agent; bh=f4gRmlLLmU3asXLOU8cZkWq3qppjlGy5+cLz7ewA8eM=; b=nnKcRDzNBD4OYXszLbIH55Bgh/Lx8iyDOrcO6PM0vUDJJXiwpzSxkMMv87ld9yyXBq i5beAjC0GGlVwbFGYGone+rEeWSYzvygjvxNtt8oFfZuxymMg+XyCkudEQJee/R5DvGv xGTwgMBkJ3JhMp1nZZFPfJlbQxFQpm5OUpK7s= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=date:from:to:cc:subject:message-id:mail-followup-to:mime-version :content-type:content-disposition:user-agent; b=HBMNdckPuH/NAdDAgV8wwM7SAQ0QfcfcWZaptUHwZxrfFEHi+z2If5tcJsnMI0QMU0 bfRJQyJ3c3d/SNu52pu0fBi/MHzGz4W1iZVOAjVbTKzG3m8k0MhplGeNaSm2kjVgGN2S e9BZpSpWooHbRB+FubfOtDQOzx0X5MN+0Opj0= Received: by 10.213.19.17 with SMTP id y17mr60971eba.85.1290538245522; Tue, 23 Nov 2010 10:50:45 -0800 (PST) Received: from localhost ([139.91.73.37]) by mx.google.com with ESMTPS id w20sm6081533eeh.6.2010.11.23.10.50.21 (version=TLSv1/SSLv3 cipher=RC4-MD5); Tue, 23 Nov 2010 10:50:32 -0800 (PST) Date: Tue, 23 Nov 2010 20:50:16 +0200 From: Nick Kossifidis To: ath5k-devel@venema.h4ckr.net, linux-wireless@vger.kernel.org Cc: linville@tuxdriver.com, me@bobcopeland.com, mcgrof@gmail.com, jirislaby@gmail.com, nbd@openwrt.org, br1@einfach.org Subject: [PATCH 06/30] ath5k: Use DCU early termination correctly Message-ID: <20101123185016.GF4303@makis.mantri> Mail-Followup-To: ath5k-devel@lists.ath5k.org, linux-wireless@vger.kernel.org, linville@tuxdriver.com, me@bobcopeland.com, mcgrof@gmail.com, jirislaby@gmail.com, nbd@openwrt.org, br1@einfach.org MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Tue, 23 Nov 2010 19:00:33 +0000 (UTC) diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c index e39c953..bfdfcff 100644 --- a/drivers/net/wireless/ath/ath5k/dma.c +++ b/drivers/net/wireless/ath/ath5k/dma.c @@ -216,6 +216,14 @@ int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) ath5k_hw_reg_write(ah, tx_queue, AR5K_CR); ath5k_hw_reg_read(ah, AR5K_CR); } else { + + /* + * Enable DCU early termination to quickly + * flush any pending frames from QCU + */ + AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), + AR5K_QCU_MISC_DCU_EARLY); + /* * Schedule TX disable and wait until queue is empty */ @@ -285,6 +293,12 @@ int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) queue); } + /* + * Disable DCU early termination + */ + AR5K_REG_DISABLE_BITS(ah, AR5K_QUEUE_MISC(queue), + AR5K_QCU_MISC_DCU_EARLY); + /* Clear register */ ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD); if (pending) { diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c index 52eee34f..ed62273 100644 --- a/drivers/net/wireless/ath/ath5k/qcu.c +++ b/drivers/net/wireless/ath/ath5k/qcu.c @@ -340,9 +340,6 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) /* * Set misc registers */ - /* Enable DCU early termination for this queue */ - AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), - AR5K_QCU_MISC_DCU_EARLY); /* Enable DCU to wait for next fragment from QCU */ AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),