| Message ID | 20191223054855.3020665-3-bjorn.andersson@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Delegated to: | Kalle Valo |
| Headers | show |
| Series | ath10k: Enable QDSS clock on sm8150 | expand |
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 373fa098ebb2..0f0c9db3d484 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -929,8 +929,8 @@ wifi: wifi@18800000 { reg = <0 0x18800000 0 0x800000>; reg-names = "membase"; memory-region = <&wlan_mem>; - clock-names = "cxo_ref_clk_pin"; - clocks = <&rpmhcc RPMH_RF_CLK2>; + clock-names = "cxo_ref_clk_pin", "qdss"; + clocks = <&rpmhcc RPMH_RF_CLK2>, <&aoss_qmp>; interrupts = <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
The WiFi firmware on SM8150 requires the QDSS clock to be ticking, so specify this clock for the wifi node. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)