From patchwork Fri Jun 19 07:53:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shayne Chen X-Patchwork-Id: 11613335 X-Patchwork-Delegate: nbd@nbd.name Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30A3A138C for ; Fri, 19 Jun 2020 07:54:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1098C2078D for ; Fri, 19 Jun 2020 07:54:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VKazcRPZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730905AbgFSHyj (ORCPT ); Fri, 19 Jun 2020 03:54:39 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:8441 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1730880AbgFSHyi (ORCPT ); Fri, 19 Jun 2020 03:54:38 -0400 X-UUID: 6f1163112088486c9cd2fc5b0c68a6d0-20200619 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=3ltb5nZixCRRCc99x3WnmbZJW+adF+mROtOvKeMYdTU=; b=VKazcRPZ0f41QhAF97CcS9nhFUfAktB8DoW9iLxUxJ9RtEmKi6D5PX6pO78/Wrm1/MbjKWIiXCDDQP+c5YmfjVlUZEvQQUmqevS6Z5PgEnXyjGL9buGGfvwvyCZDQPzV9tIqQWM+Z1J51bFNVYBfL2HQ83kOirkK1cATWdFWQNQ=; X-UUID: 6f1163112088486c9cd2fc5b0c68a6d0-20200619 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1039615397; Fri, 19 Jun 2020 15:54:35 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 19 Jun 2020 15:54:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 19 Jun 2020 15:54:33 +0800 From: Shayne Chen To: Felix Fietkau CC: linux-wireless , Lorenzo Bianconi , Ryder Lee , Evelyn Tsai , linux-mediatek , Shayne Chen Subject: [PATCH v2 1/3] mt76: mt7915: add support for DT rate power limits Date: Fri, 19 Jun 2020 15:53:54 +0800 Message-ID: <20200619075356.21998-1-shayne.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-SNTS-SMTP: 93753E75486CD0CC19EF944C029F540EC5AF6B68F7BACB2C1D540A680174057C2000:8 X-MTK: N Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Enable to limit per-rate max txpower from DT. Tested-by: Evelyn Tsai Signed-off-by: Shayne Chen --- v2: - subtract nss_delta from txpower_cur - set txpower_cur to the return code of mt76_get_rate_power_limits The series is based on Felix's https://patchwork.kernel.org/project/linux-wireless/list/?series=303913 --- .../net/wireless/mediatek/mt76/mt7915/mcu.c | 44 ++++++++++++++++--- 1 file changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c index c8c12c7..1078770 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c @@ -3068,15 +3068,47 @@ int mt7915_mcu_set_sku(struct mt7915_phy *phy) .format_id = 4, .dbdc_idx = phy != &dev->phy, }; - int i; - s8 *delta; + struct mt76_power_limits limits_array; + s8 *delta, *la = (s8 *)&limits_array; + int i, idx, n_chains = hweight8(mphy->antenna_mask); + int tx_power; delta = dev->rate_power[mphy->chandef.chan->band]; - mphy->txpower_cur = hw->conf.power_level * 2 + - delta[MT7915_SKU_MAX_DELTA_IDX]; + tx_power = hw->conf.power_level * 2 - + mt76_tx_power_nss_delta(n_chains); - for (i = 0; i < MT7915_SKU_RATE_NUM; i++) - req.val[i] = hw->conf.power_level * 2 + delta[i]; + tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, + &limits_array, tx_power); + mphy->txpower_cur = tx_power; + + for (i = 0, idx = 0; i < ARRAY_SIZE(mt7915_sku_groups); i++) { + const struct sku_group *sku = &mt7915_sku_groups[i]; + u32 offset = sku->offset[mphy->chandef.chan->band]; + u8 mcs_num = sku->len; + int j; + + if (i >= SKU_HT_BW20 && i <= SKU_VHT_BW160) { + mcs_num = 10; + + if (i == SKU_HT_BW20 || i == SKU_VHT_BW20) + la = (s8 *)&limits_array + 12; + } + + if (!offset) { + idx += sku->len; + la += mcs_num; + continue; + } + + for (j = 0; j < min_t(u8, mcs_num, sku->len); j++) { + s8 rate_power; + + rate_power = hw->conf.power_level * 2 + delta[idx + j]; + req.val[idx + j] = min_t(s8, la[j], rate_power); + } + la += mcs_num; + idx += sku->len; + } return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_TX_POWER_FEATURE_CTRL,