| Message ID | 20210927152412.2900928-1-arnd@kernel.org (mailing list archive) |
|---|---|
| State | RFC |
| Delegated to: | Kalle Valo |
| Headers | show |
| Series | [RFC] qcom_scm: hide Kconfig symbol | expand |
On Mon 27 Sep 08:22 PDT 2021, Arnd Bergmann wrote: > From: Arnd Bergmann <arnd@arndb.de> > > Now that SCM can be a loadable module, we have to add another > dependency to avoid link failures when ipa or adreno-gpu are > built-in: > > aarch64-linux-ld: drivers/net/ipa/ipa_main.o: in function `ipa_probe': > ipa_main.c:(.text+0xfc4): undefined reference to `qcom_scm_is_available' > > ld.lld: error: undefined symbol: qcom_scm_is_available > >>> referenced by adreno_gpu.c > >>> gpu/drm/msm/adreno/adreno_gpu.o:(adreno_zap_shader_load) in archive drivers/built-in.a > > This can happen when CONFIG_ARCH_QCOM is disabled and we don't select > QCOM_MDT_LOADER, but some other module selects QCOM_SCM. Ideally we'd > use a similar dependency here to what we have for QCOM_RPROC_COMMON, > but that causes dependency loops from other things selecting QCOM_SCM. > > This appears to be an endless problem, so try something different this > time: > > - CONFIG_QCOM_SCM becomes a hidden symbol that nothing 'depends on' > but that is simply selected by all of its users > > - All the stubs in include/linux/qcom_scm.h can go away > > - arm-smccc.h needs to provide a stub for __arm_smccc_smc() to > allow compile-testing QCOM_SCM on all architectures. > > - To avoid a circular dependency chain involving RESET_CONTROLLER > and PINCTRL_SUNXI, change the 'depends on RESET_CONTROLLER' in > the latter one to 'select'. Can you please help me understand why this is part of the same patch? > > The last bit is rather annoying, as drivers should generally never > 'select' another subsystem, and about half the users of the reset > controller interface do this anyway. > > Nevertheless, this version seems to pass all my randconfig tests > and is more robust than any of the prior versions. > > Comments? > I like it! It's less confusing than the current scheme, so should be easier to get right. And I like the fact that we don't need the stubs anymore. @John, could you please have a look at this as well, wrt GKI. Regards, Bjorn > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > --- > drivers/firmware/Kconfig | 4 +- > drivers/gpu/drm/msm/Kconfig | 4 +- > drivers/iommu/Kconfig | 2 +- > drivers/media/platform/Kconfig | 2 +- > drivers/mmc/host/Kconfig | 2 +- > drivers/net/ipa/Kconfig | 1 + > drivers/net/wireless/ath/ath10k/Kconfig | 2 +- > drivers/pinctrl/qcom/Kconfig | 3 +- > drivers/pinctrl/sunxi/Kconfig | 6 +-- > include/linux/arm-smccc.h | 10 ++++ > include/linux/qcom_scm.h | 71 ------------------------- > 11 files changed, 23 insertions(+), 84 deletions(-) > > diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig > index 220a58cf0a44..f7dd82ef0b9c 100644 > --- a/drivers/firmware/Kconfig > +++ b/drivers/firmware/Kconfig > @@ -203,9 +203,7 @@ config INTEL_STRATIX10_RSU > Say Y here if you want Intel RSU support. > > config QCOM_SCM > - tristate "Qcom SCM driver" > - depends on ARM || ARM64 > - depends on HAVE_ARM_SMCCC > + tristate > select RESET_CONTROLLER > > config QCOM_SCM_DOWNLOAD_MODE_DEFAULT > diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig > index e9c6af78b1d7..3ddf739a6f9b 100644 > --- a/drivers/gpu/drm/msm/Kconfig > +++ b/drivers/gpu/drm/msm/Kconfig > @@ -17,7 +17,7 @@ config DRM_MSM > select DRM_SCHED > select SHMEM > select TMPFS > - select QCOM_SCM if ARCH_QCOM > + select QCOM_SCM > select WANT_DEV_COREDUMP > select SND_SOC_HDMI_CODEC if SND_SOC > select SYNC_FILE > @@ -55,7 +55,7 @@ config DRM_MSM_GPU_SUDO > > config DRM_MSM_HDMI_HDCP > bool "Enable HDMI HDCP support in MSM DRM driver" > - depends on DRM_MSM && QCOM_SCM > + depends on DRM_MSM > default y > help > Choose this option to enable HDCP state machine > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > index 124c41adeca1..989c83acbfee 100644 > --- a/drivers/iommu/Kconfig > +++ b/drivers/iommu/Kconfig > @@ -308,7 +308,7 @@ config APPLE_DART > config ARM_SMMU > tristate "ARM Ltd. System MMU (SMMU) Support" > depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) > - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y > + select QCOM_SCM > select IOMMU_API > select IOMMU_IO_PGTABLE_LPAE > select ARM_DMA_USE_IOMMU if ARM > diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig > index 157c924686e4..80321e03809a 100644 > --- a/drivers/media/platform/Kconfig > +++ b/drivers/media/platform/Kconfig > @@ -565,7 +565,7 @@ config VIDEO_QCOM_VENUS > depends on VIDEO_DEV && VIDEO_V4L2 && QCOM_SMEM > depends on (ARCH_QCOM && IOMMU_DMA) || COMPILE_TEST > select QCOM_MDT_LOADER if ARCH_QCOM > - select QCOM_SCM if ARCH_QCOM > + select QCOM_SCM > select VIDEOBUF2_DMA_CONTIG > select V4L2_MEM2MEM_DEV > help > diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig > index 71313961cc54..95b3511b0560 100644 > --- a/drivers/mmc/host/Kconfig > +++ b/drivers/mmc/host/Kconfig > @@ -547,7 +547,7 @@ config MMC_SDHCI_MSM > depends on MMC_SDHCI_PLTFM > select MMC_SDHCI_IO_ACCESSORS > select MMC_CQHCI > - select QCOM_SCM if MMC_CRYPTO && ARCH_QCOM > + select QCOM_SCM if MMC_CRYPTO > help > This selects the Secure Digital Host Controller Interface (SDHCI) > support present in Qualcomm SOCs. The controller supports > diff --git a/drivers/net/ipa/Kconfig b/drivers/net/ipa/Kconfig > index 8f99cfa14680..d037682fb7ad 100644 > --- a/drivers/net/ipa/Kconfig > +++ b/drivers/net/ipa/Kconfig > @@ -4,6 +4,7 @@ config QCOM_IPA > depends on ARCH_QCOM || COMPILE_TEST > depends on QCOM_RPROC_COMMON || (QCOM_RPROC_COMMON=n && COMPILE_TEST) > select QCOM_MDT_LOADER if ARCH_QCOM > + select QCOM_SCM > select QCOM_QMI_HELPERS > help > Choose Y or M here to include support for the Qualcomm > diff --git a/drivers/net/wireless/ath/ath10k/Kconfig b/drivers/net/wireless/ath/ath10k/Kconfig > index 741289e385d5..ca007b800f75 100644 > --- a/drivers/net/wireless/ath/ath10k/Kconfig > +++ b/drivers/net/wireless/ath/ath10k/Kconfig > @@ -44,7 +44,7 @@ config ATH10K_SNOC > tristate "Qualcomm ath10k SNOC support" > depends on ATH10K > depends on ARCH_QCOM || COMPILE_TEST > - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y > + select QCOM_SCM > select QCOM_QMI_HELPERS > help > This module adds support for integrated WCN3990 chip connected > diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig > index 32ea2a8ec02b..5ff4207df66e 100644 > --- a/drivers/pinctrl/qcom/Kconfig > +++ b/drivers/pinctrl/qcom/Kconfig > @@ -3,7 +3,8 @@ if (ARCH_QCOM || COMPILE_TEST) > > config PINCTRL_MSM > tristate "Qualcomm core pin controller driver" > - depends on GPIOLIB && (QCOM_SCM || !QCOM_SCM) #if QCOM_SCM=m this can't be =y > + depends on GPIOLIB > + select QCOM_SCM > select PINMUX > select PINCONF > select GENERIC_PINCONF > diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig > index 33751a6a0757..3447d2744ca3 100644 > --- a/drivers/pinctrl/sunxi/Kconfig > +++ b/drivers/pinctrl/sunxi/Kconfig > @@ -29,7 +29,7 @@ config PINCTRL_SUN6I_A31 > config PINCTRL_SUN6I_A31_R > bool "Support for the Allwinner A31 R-PIO" > default MACH_SUN6I > - depends on RESET_CONTROLLER > + select RESET_CONTROLLER > select PINCTRL_SUNXI > > config PINCTRL_SUN8I_A23 > @@ -55,7 +55,7 @@ config PINCTRL_SUN8I_A83T_R > config PINCTRL_SUN8I_A23_R > bool "Support for the Allwinner A23 and A33 R-PIO" > default MACH_SUN8I > - depends on RESET_CONTROLLER > + select RESET_CONTROLLER > select PINCTRL_SUNXI > > config PINCTRL_SUN8I_H3 > @@ -81,7 +81,7 @@ config PINCTRL_SUN9I_A80 > config PINCTRL_SUN9I_A80_R > bool "Support for the Allwinner A80 R-PIO" > default MACH_SUN9I > - depends on RESET_CONTROLLER > + select RESET_CONTROLLER > select PINCTRL_SUNXI > > config PINCTRL_SUN50I_A64 > diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h > index 7d1cabe15262..63ccb5252190 100644 > --- a/include/linux/arm-smccc.h > +++ b/include/linux/arm-smccc.h > @@ -321,10 +321,20 @@ asmlinkage unsigned long __arm_smccc_sve_check(unsigned long x0); > * from register 0 to 3 on return from the SMC instruction. An optional > * quirk structure provides vendor specific behavior. > */ > +#ifdef CONFIG_HAVE_ARM_SMCCC > asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, > unsigned long a2, unsigned long a3, unsigned long a4, > unsigned long a5, unsigned long a6, unsigned long a7, > struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); > +#else > +static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1, > + unsigned long a2, unsigned long a3, unsigned long a4, > + unsigned long a5, unsigned long a6, unsigned long a7, > + struct arm_smccc_res *res, struct arm_smccc_quirk *quirk) > +{ > + *res = (struct arm_smccc_res){}; > +} > +#endif > > /** > * __arm_smccc_hvc() - make HVC calls > diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h > index c0475d1c9885..81cad9e1e412 100644 > --- a/include/linux/qcom_scm.h > +++ b/include/linux/qcom_scm.h > @@ -61,7 +61,6 @@ enum qcom_scm_ice_cipher { > #define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE) > #define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC) > > -#if IS_ENABLED(CONFIG_QCOM_SCM) > extern bool qcom_scm_is_available(void); > > extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); > @@ -115,74 +114,4 @@ extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, > extern int qcom_scm_lmh_profile_change(u32 profile_id); > extern bool qcom_scm_lmh_dcvsh_available(void); > > -#else > - > -#include <linux/errno.h> > - > -static inline bool qcom_scm_is_available(void) { return false; } > - > -static inline int qcom_scm_set_cold_boot_addr(void *entry, > - const cpumask_t *cpus) { return -ENODEV; } > -static inline int qcom_scm_set_warm_boot_addr(void *entry, > - const cpumask_t *cpus) { return -ENODEV; } > -static inline void qcom_scm_cpu_power_down(u32 flags) {} > -static inline u32 qcom_scm_set_remote_state(u32 state,u32 id) > - { return -ENODEV; } > - > -static inline int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, > - size_t size) { return -ENODEV; } > -static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, > - phys_addr_t size) { return -ENODEV; } > -static inline int qcom_scm_pas_auth_and_reset(u32 peripheral) > - { return -ENODEV; } > -static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; } > -static inline bool qcom_scm_pas_supported(u32 peripheral) { return false; } > - > -static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val) > - { return -ENODEV; } > -static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val) > - { return -ENODEV; } > - > -static inline bool qcom_scm_restore_sec_cfg_available(void) { return false; } > -static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) > - { return -ENODEV; } > -static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) > - { return -ENODEV; } > -static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) > - { return -ENODEV; } > -extern inline int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size, > - u32 cp_nonpixel_start, > - u32 cp_nonpixel_size) > - { return -ENODEV; } > -static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, > - unsigned int *src, const struct qcom_scm_vmperm *newvm, > - unsigned int dest_cnt) { return -ENODEV; } > - > -static inline bool qcom_scm_ocmem_lock_available(void) { return false; } > -static inline int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset, > - u32 size, u32 mode) { return -ENODEV; } > -static inline int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, > - u32 offset, u32 size) { return -ENODEV; } > - > -static inline bool qcom_scm_ice_available(void) { return false; } > -static inline int qcom_scm_ice_invalidate_key(u32 index) { return -ENODEV; } > -static inline int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size, > - enum qcom_scm_ice_cipher cipher, > - u32 data_unit_size) { return -ENODEV; } > - > -static inline bool qcom_scm_hdcp_available(void) { return false; } > -static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, > - u32 *resp) { return -ENODEV; } > - > -static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en) > - { return -ENODEV; } > - > -static inline int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, > - u64 limit_node, u32 node_id, u64 version) > - { return -ENODEV; } > - > -static inline int qcom_scm_lmh_profile_change(u32 profile_id) { return -ENODEV; } > - > -static inline bool qcom_scm_lmh_dcvsh_available(void) { return -ENODEV; } > -#endif > #endif > -- > 2.29.2 >
On Mon, Sep 27, 2021 at 9:52 PM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > On Mon 27 Sep 08:22 PDT 2021, Arnd Bergmann wrote: > > From: Arnd Bergmann <arnd@arndb.de> > > > > - To avoid a circular dependency chain involving RESET_CONTROLLER > > and PINCTRL_SUNXI, change the 'depends on RESET_CONTROLLER' in > > the latter one to 'select'. > > Can you please help me understand why this is part of the same patch? This can be done as a preparatory patch if we decide to do it this way, for the review it seemed better to spell out that this is required. I still hope that we can avoid adding another 'select RESET_CONTROLLER' if someone can figure out what to do instead. The problem here is that QCOM_SCM selects RESET_CONTROLLER, and turning that into 'depends on' would in turn mean that any driver that wants to select QCOM_SCM would have to have the same RESET_CONTROLLER dependency. An easier option might be to find a way to build QCOM_SCM without RESET_CONTROLLER for compile testing purposes. I don't know what would break from that. Arnd
On Mon 27 Sep 13:15 PDT 2021, Arnd Bergmann wrote: > On Mon, Sep 27, 2021 at 9:52 PM Bjorn Andersson > <bjorn.andersson@linaro.org> wrote: > > On Mon 27 Sep 08:22 PDT 2021, Arnd Bergmann wrote: > > > From: Arnd Bergmann <arnd@arndb.de> > > > > > > - To avoid a circular dependency chain involving RESET_CONTROLLER > > > and PINCTRL_SUNXI, change the 'depends on RESET_CONTROLLER' in > > > the latter one to 'select'. > > > > Can you please help me understand why this is part of the same patch? > > This can be done as a preparatory patch if we decide to do it this way, > for the review it seemed better to spell out that this is required. > > I still hope that we can avoid adding another 'select RESET_CONTROLLER' > if someone can figure out what to do instead. > Okay, thanks. > The problem here is that QCOM_SCM selects RESET_CONTROLLER, > and turning that into 'depends on' would in turn mean that any driver that > wants to select QCOM_SCM would have to have the same RESET_CONTROLLER > dependency. > Right, and that will just be another thing we'll get wrong across the tree. > An easier option might be to find a way to build QCOM_SCM without > RESET_CONTROLLER for compile testing purposes. I don't know > what would break from that. > Afaict the reset API is properly stubbed and RESET_CONTROLLER is a bool, so I think we can simply drop the "select" and the kernel will still compile fine in all combinations. When it comes to runtime, we currently select RESET_CONTROLLER from the Qualcomm common clocks. If that is dropped (why would it...) it seems possible to build a custom kernel for msm8916 that we can boot and miss the stubbed out "mss restart" reset line from the SCM. So, let's just drop the select RESET_CONTROLLER from SCM for now. Regards, Bjorn
On Mon, Sep 27, 2021 at 10:42 PM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > On Mon 27 Sep 13:15 PDT 2021, Arnd Bergmann wrote: > > On Mon, Sep 27, 2021 at 9:52 PM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > > > An easier option might be to find a way to build QCOM_SCM without > > RESET_CONTROLLER for compile testing purposes. I don't know > > what would break from that. > > > > Afaict the reset API is properly stubbed and RESET_CONTROLLER is a bool, > so I think we can simply drop the "select" and the kernel will still > compile fine in all combinations. > > When it comes to runtime, we currently select RESET_CONTROLLER from the > Qualcomm common clocks. If that is dropped (why would it...) it seems > possible to build a custom kernel for msm8916 that we can boot and miss > the stubbed out "mss restart" reset line from the SCM. > > > So, let's just drop the select RESET_CONTROLLER from SCM for now. Ok, I've made that change locally, giving it more time on the randconfig build box now. Arnd
Arnd Bergmann <arnd@kernel.org> writes: > From: Arnd Bergmann <arnd@arndb.de> > > Now that SCM can be a loadable module, we have to add another > dependency to avoid link failures when ipa or adreno-gpu are > built-in: > > aarch64-linux-ld: drivers/net/ipa/ipa_main.o: in function `ipa_probe': > ipa_main.c:(.text+0xfc4): undefined reference to `qcom_scm_is_available' > > ld.lld: error: undefined symbol: qcom_scm_is_available >>>> referenced by adreno_gpu.c >>>> gpu/drm/msm/adreno/adreno_gpu.o:(adreno_zap_shader_load) >>>> in archive drivers/built-in.a > > This can happen when CONFIG_ARCH_QCOM is disabled and we don't select > QCOM_MDT_LOADER, but some other module selects QCOM_SCM. Ideally we'd > use a similar dependency here to what we have for QCOM_RPROC_COMMON, > but that causes dependency loops from other things selecting QCOM_SCM. > > This appears to be an endless problem, so try something different this > time: > > - CONFIG_QCOM_SCM becomes a hidden symbol that nothing 'depends on' > but that is simply selected by all of its users > > - All the stubs in include/linux/qcom_scm.h can go away > > - arm-smccc.h needs to provide a stub for __arm_smccc_smc() to > allow compile-testing QCOM_SCM on all architectures. > > - To avoid a circular dependency chain involving RESET_CONTROLLER > and PINCTRL_SUNXI, change the 'depends on RESET_CONTROLLER' in > the latter one to 'select'. > > The last bit is rather annoying, as drivers should generally never > 'select' another subsystem, and about half the users of the reset > controller interface do this anyway. > > Nevertheless, this version seems to pass all my randconfig tests > and is more robust than any of the prior versions. > > Comments? > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> [...] > diff --git a/drivers/net/wireless/ath/ath10k/Kconfig b/drivers/net/wireless/ath/ath10k/Kconfig > index 741289e385d5..ca007b800f75 100644 > --- a/drivers/net/wireless/ath/ath10k/Kconfig > +++ b/drivers/net/wireless/ath/ath10k/Kconfig > @@ -44,7 +44,7 @@ config ATH10K_SNOC > tristate "Qualcomm ath10k SNOC support" > depends on ATH10K > depends on ARCH_QCOM || COMPILE_TEST > - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y > + select QCOM_SCM > select QCOM_QMI_HELPERS > help > This module adds support for integrated WCN3990 chip connected I assume I can continue to build test ATH10K_SNOC with x86 as before? That's important for me. If yes, then: Acked-by: Kalle Valo <kvalo@codeaurora.org>
On Tue, Sep 28, 2021 at 9:05 AM Kalle Valo <kvalo@codeaurora.org> wrote: > Arnd Bergmann <arnd@kernel.org> writes: > > From: Arnd Bergmann <arnd@arndb.de> > I assume I can continue to build test ATH10K_SNOC with x86 as before? > That's important for me. If yes, then: > > Acked-by: Kalle Valo <kvalo@codeaurora.org> > > -- > https://patchwork.kernel.org/project/linux-wireless/list/ > > https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches Yes, the difference is that this will then also build the qcom_scm module, but that should not cause any problems after the other changes in this patch. Arnd
On Mon, Sep 27, 2021 at 05:22:13PM +0200, Arnd Bergmann wrote: > From: Arnd Bergmann <arnd@arndb.de> > > Now that SCM can be a loadable module, we have to add another > dependency to avoid link failures when ipa or adreno-gpu are > built-in: > > aarch64-linux-ld: drivers/net/ipa/ipa_main.o: in function `ipa_probe': > ipa_main.c:(.text+0xfc4): undefined reference to `qcom_scm_is_available' > > ld.lld: error: undefined symbol: qcom_scm_is_available > >>> referenced by adreno_gpu.c > >>> gpu/drm/msm/adreno/adreno_gpu.o:(adreno_zap_shader_load) in archive drivers/built-in.a > > This can happen when CONFIG_ARCH_QCOM is disabled and we don't select > QCOM_MDT_LOADER, but some other module selects QCOM_SCM. Ideally we'd > use a similar dependency here to what we have for QCOM_RPROC_COMMON, > but that causes dependency loops from other things selecting QCOM_SCM. > > This appears to be an endless problem, so try something different this > time: > > - CONFIG_QCOM_SCM becomes a hidden symbol that nothing 'depends on' > but that is simply selected by all of its users > > - All the stubs in include/linux/qcom_scm.h can go away > > - arm-smccc.h needs to provide a stub for __arm_smccc_smc() to > allow compile-testing QCOM_SCM on all architectures. > > - To avoid a circular dependency chain involving RESET_CONTROLLER > and PINCTRL_SUNXI, change the 'depends on RESET_CONTROLLER' in > the latter one to 'select'. > > The last bit is rather annoying, as drivers should generally never > 'select' another subsystem, and about half the users of the reset > controller interface do this anyway. > > Nevertheless, this version seems to pass all my randconfig tests > and is more robust than any of the prior versions. > > Comments? > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > --- > drivers/firmware/Kconfig | 4 +- > drivers/gpu/drm/msm/Kconfig | 4 +- > drivers/iommu/Kconfig | 2 +- > drivers/media/platform/Kconfig | 2 +- > drivers/mmc/host/Kconfig | 2 +- > drivers/net/ipa/Kconfig | 1 + > drivers/net/wireless/ath/ath10k/Kconfig | 2 +- > drivers/pinctrl/qcom/Kconfig | 3 +- > drivers/pinctrl/sunxi/Kconfig | 6 +-- > include/linux/arm-smccc.h | 10 ++++ > include/linux/qcom_scm.h | 71 ------------------------- > 11 files changed, 23 insertions(+), 84 deletions(-) > > diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig > index 220a58cf0a44..f7dd82ef0b9c 100644 > --- a/drivers/firmware/Kconfig > +++ b/drivers/firmware/Kconfig > @@ -203,9 +203,7 @@ config INTEL_STRATIX10_RSU > Say Y here if you want Intel RSU support. > > config QCOM_SCM > - tristate "Qcom SCM driver" > - depends on ARM || ARM64 > - depends on HAVE_ARM_SMCCC > + tristate > select RESET_CONTROLLER > > config QCOM_SCM_DOWNLOAD_MODE_DEFAULT > diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig > index e9c6af78b1d7..3ddf739a6f9b 100644 > --- a/drivers/gpu/drm/msm/Kconfig > +++ b/drivers/gpu/drm/msm/Kconfig > @@ -17,7 +17,7 @@ config DRM_MSM > select DRM_SCHED > select SHMEM > select TMPFS > - select QCOM_SCM if ARCH_QCOM > + select QCOM_SCM > select WANT_DEV_COREDUMP > select SND_SOC_HDMI_CODEC if SND_SOC > select SYNC_FILE > @@ -55,7 +55,7 @@ config DRM_MSM_GPU_SUDO > > config DRM_MSM_HDMI_HDCP > bool "Enable HDMI HDCP support in MSM DRM driver" > - depends on DRM_MSM && QCOM_SCM > + depends on DRM_MSM > default y > help > Choose this option to enable HDCP state machine > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > index 124c41adeca1..989c83acbfee 100644 > --- a/drivers/iommu/Kconfig > +++ b/drivers/iommu/Kconfig > @@ -308,7 +308,7 @@ config APPLE_DART > config ARM_SMMU > tristate "ARM Ltd. System MMU (SMMU) Support" > depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) > - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y > + select QCOM_SCM > select IOMMU_API > select IOMMU_IO_PGTABLE_LPAE > select ARM_DMA_USE_IOMMU if ARM I don't want to get in the way of this patch because I'm also tired of the randconfig failures caused by QCOM_SCM. However, ARM_SMMU is applicable to a wide variety of (non-qcom) SoCs and so it seems a shame to require the QCOM_SCM code to be included for all of those when it's not strictly needed at all. Will
On Wed, Sep 29, 2021 at 11:51 AM Will Deacon <will@kernel.org> wrote: > On Mon, Sep 27, 2021 at 05:22:13PM +0200, Arnd Bergmann wrote: > > > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > > index 124c41adeca1..989c83acbfee 100644 > > --- a/drivers/iommu/Kconfig > > +++ b/drivers/iommu/Kconfig > > @@ -308,7 +308,7 @@ config APPLE_DART > > config ARM_SMMU > > tristate "ARM Ltd. System MMU (SMMU) Support" > > depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) > > - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y > > + select QCOM_SCM > > select IOMMU_API > > select IOMMU_IO_PGTABLE_LPAE > > select ARM_DMA_USE_IOMMU if ARM > > I don't want to get in the way of this patch because I'm also tired of the > randconfig failures caused by QCOM_SCM. However, ARM_SMMU is applicable to > a wide variety of (non-qcom) SoCs and so it seems a shame to require the > QCOM_SCM code to be included for all of those when it's not strictly needed > at all. Good point, I agree that needs to be fixed. I think this additional change should do the trick: --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -308,7 +308,6 @@ config APPLE_DART config ARM_SMMU tristate "ARM Ltd. System MMU (SMMU) Support" depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) - select QCOM_SCM select IOMMU_API select IOMMU_IO_PGTABLE_LPAE select ARM_DMA_USE_IOMMU if ARM @@ -438,7 +437,7 @@ config QCOM_IOMMU # Note: iommu drivers cannot (yet?) be built as modules bool "Qualcomm IOMMU Support" depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) - depends on QCOM_SCM=y + select QCOM_SCM select IOMMU_API select IOMMU_IO_PGTABLE_LPAE select ARM_DMA_USE_IOMMU I'll see if that causes any problems for the randconfig builds. Arnd
On Wed 29 Sep 05:04 CDT 2021, Arnd Bergmann wrote: > On Wed, Sep 29, 2021 at 11:51 AM Will Deacon <will@kernel.org> wrote: > > On Mon, Sep 27, 2021 at 05:22:13PM +0200, Arnd Bergmann wrote: > > > > > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > > > index 124c41adeca1..989c83acbfee 100644 > > > --- a/drivers/iommu/Kconfig > > > +++ b/drivers/iommu/Kconfig > > > @@ -308,7 +308,7 @@ config APPLE_DART > > > config ARM_SMMU > > > tristate "ARM Ltd. System MMU (SMMU) Support" > > > depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) > > > - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y > > > + select QCOM_SCM > > > select IOMMU_API > > > select IOMMU_IO_PGTABLE_LPAE > > > select ARM_DMA_USE_IOMMU if ARM > > > > I don't want to get in the way of this patch because I'm also tired of the > > randconfig failures caused by QCOM_SCM. However, ARM_SMMU is applicable to > > a wide variety of (non-qcom) SoCs and so it seems a shame to require the > > QCOM_SCM code to be included for all of those when it's not strictly needed > > at all. > > Good point, I agree that needs to be fixed. I think this additional > change should do the trick: > ARM_SMMU and QCOM_IOMMU are two separate implementations and both uses QCOM_SCM. So both of them should select QCOM_SCM. "Unfortunately" the Qualcomm portion of ARM_SMMU is builtin unconditionally, so going with something like select QCOM_SCM if ARCH_QCOM would still require the stubs in qcom_scm.h. Regards, Bjorn > --- a/drivers/iommu/Kconfig > +++ b/drivers/iommu/Kconfig > @@ -308,7 +308,6 @@ config APPLE_DART > config ARM_SMMU > tristate "ARM Ltd. System MMU (SMMU) Support" > depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) > - select QCOM_SCM > select IOMMU_API > select IOMMU_IO_PGTABLE_LPAE > select ARM_DMA_USE_IOMMU if ARM > @@ -438,7 +437,7 @@ config QCOM_IOMMU > # Note: iommu drivers cannot (yet?) be built as modules > bool "Qualcomm IOMMU Support" > depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) > - depends on QCOM_SCM=y > + select QCOM_SCM > select IOMMU_API > select IOMMU_IO_PGTABLE_LPAE > select ARM_DMA_USE_IOMMU > > I'll see if that causes any problems for the randconfig builds. > > Arnd
On Wed, Sep 29, 2021 at 4:46 PM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > On Wed 29 Sep 05:04 CDT 2021, Arnd Bergmann wrote: > > > On Wed, Sep 29, 2021 at 11:51 AM Will Deacon <will@kernel.org> wrote: > > > On Mon, Sep 27, 2021 at 05:22:13PM +0200, Arnd Bergmann wrote: > > > > > > > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > > > > index 124c41adeca1..989c83acbfee 100644 > > > > --- a/drivers/iommu/Kconfig > > > > +++ b/drivers/iommu/Kconfig > > > > @@ -308,7 +308,7 @@ config APPLE_DART > > > > config ARM_SMMU > > > > tristate "ARM Ltd. System MMU (SMMU) Support" > > > > depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) > > > > - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y > > > > + select QCOM_SCM > > > > select IOMMU_API > > > > select IOMMU_IO_PGTABLE_LPAE > > > > select ARM_DMA_USE_IOMMU if ARM > > > > > > I don't want to get in the way of this patch because I'm also tired of the > > > randconfig failures caused by QCOM_SCM. However, ARM_SMMU is applicable to > > > a wide variety of (non-qcom) SoCs and so it seems a shame to require the > > > QCOM_SCM code to be included for all of those when it's not strictly needed > > > at all. > > > > Good point, I agree that needs to be fixed. I think this additional > > change should do the trick: > > > > ARM_SMMU and QCOM_IOMMU are two separate implementations and both uses > QCOM_SCM. So both of them should select QCOM_SCM. Right, I figured that out later as well. > "Unfortunately" the Qualcomm portion of ARM_SMMU is builtin > unconditionally, so going with something like select QCOM_SCM if > ARCH_QCOM would still require the stubs in qcom_scm.h. Yes, sounds good. I also noticed that I still need one hack in there if I do this: diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 55690af1b25d..36c304a8fc9b 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -427,6 +427,9 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) { const struct device_node *np = smmu->dev->of_node; + if (!IS_ENABLED(CONFIG_QCOM_SCM)) + return ERR_PTR(-ENXIO); + #ifdef CONFIG_ACPI if (np == NULL) { /* Match platform for ACPI boot */ Otherwise it still breaks with ARM_SMMU=y and QCOM_SCM=m. Splitting out the qualcomm portion of the arm_smmu driver using a separate 'bool' symbol should also work, if you prefer that and can suggest a name and help text for that symbol. It would look like diff --git a/drivers/iommu/arm/arm-smmu/Makefile b/drivers/iommu/arm/arm-smmu/Makefile index e240a7bcf310..b0cc01aa20c9 100644 --- a/drivers/iommu/arm/arm-smmu/Makefile +++ b/drivers/iommu/arm/arm-smmu/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_QCOM_IOMMU) += qcom_iommu.o obj-$(CONFIG_ARM_SMMU) += arm_smmu.o -arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o arm-smmu-qcom.o +arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o +arm_smmu-$(CONFIG_ARM_SMMU_QCOM) += arm-smmu-qcom.o diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c index 9f465e146799..2c25cce38060 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c @@ -215,7 +215,8 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) of_device_is_compatible(np, "nvidia,tegra186-smmu")) return nvidia_smmu_impl_init(smmu); - smmu = qcom_smmu_impl_init(smmu); + if (IS_ENABLED(CONFIG_ARM_SMMU_QCOM)) + smmu = qcom_smmu_impl_init(smmu); if (of_device_is_compatible(np, "marvell,ap806-smmu-500")) smmu->impl = &mrvl_mmu500_impl; Arnd
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 220a58cf0a44..f7dd82ef0b9c 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -203,9 +203,7 @@ config INTEL_STRATIX10_RSU Say Y here if you want Intel RSU support. config QCOM_SCM - tristate "Qcom SCM driver" - depends on ARM || ARM64 - depends on HAVE_ARM_SMCCC + tristate select RESET_CONTROLLER config QCOM_SCM_DOWNLOAD_MODE_DEFAULT diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index e9c6af78b1d7..3ddf739a6f9b 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -17,7 +17,7 @@ config DRM_MSM select DRM_SCHED select SHMEM select TMPFS - select QCOM_SCM if ARCH_QCOM + select QCOM_SCM select WANT_DEV_COREDUMP select SND_SOC_HDMI_CODEC if SND_SOC select SYNC_FILE @@ -55,7 +55,7 @@ config DRM_MSM_GPU_SUDO config DRM_MSM_HDMI_HDCP bool "Enable HDMI HDCP support in MSM DRM driver" - depends on DRM_MSM && QCOM_SCM + depends on DRM_MSM default y help Choose this option to enable HDCP state machine diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 124c41adeca1..989c83acbfee 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -308,7 +308,7 @@ config APPLE_DART config ARM_SMMU tristate "ARM Ltd. System MMU (SMMU) Support" depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y + select QCOM_SCM select IOMMU_API select IOMMU_IO_PGTABLE_LPAE select ARM_DMA_USE_IOMMU if ARM diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 157c924686e4..80321e03809a 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -565,7 +565,7 @@ config VIDEO_QCOM_VENUS depends on VIDEO_DEV && VIDEO_V4L2 && QCOM_SMEM depends on (ARCH_QCOM && IOMMU_DMA) || COMPILE_TEST select QCOM_MDT_LOADER if ARCH_QCOM - select QCOM_SCM if ARCH_QCOM + select QCOM_SCM select VIDEOBUF2_DMA_CONTIG select V4L2_MEM2MEM_DEV help diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 71313961cc54..95b3511b0560 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -547,7 +547,7 @@ config MMC_SDHCI_MSM depends on MMC_SDHCI_PLTFM select MMC_SDHCI_IO_ACCESSORS select MMC_CQHCI - select QCOM_SCM if MMC_CRYPTO && ARCH_QCOM + select QCOM_SCM if MMC_CRYPTO help This selects the Secure Digital Host Controller Interface (SDHCI) support present in Qualcomm SOCs. The controller supports diff --git a/drivers/net/ipa/Kconfig b/drivers/net/ipa/Kconfig index 8f99cfa14680..d037682fb7ad 100644 --- a/drivers/net/ipa/Kconfig +++ b/drivers/net/ipa/Kconfig @@ -4,6 +4,7 @@ config QCOM_IPA depends on ARCH_QCOM || COMPILE_TEST depends on QCOM_RPROC_COMMON || (QCOM_RPROC_COMMON=n && COMPILE_TEST) select QCOM_MDT_LOADER if ARCH_QCOM + select QCOM_SCM select QCOM_QMI_HELPERS help Choose Y or M here to include support for the Qualcomm diff --git a/drivers/net/wireless/ath/ath10k/Kconfig b/drivers/net/wireless/ath/ath10k/Kconfig index 741289e385d5..ca007b800f75 100644 --- a/drivers/net/wireless/ath/ath10k/Kconfig +++ b/drivers/net/wireless/ath/ath10k/Kconfig @@ -44,7 +44,7 @@ config ATH10K_SNOC tristate "Qualcomm ath10k SNOC support" depends on ATH10K depends on ARCH_QCOM || COMPILE_TEST - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y + select QCOM_SCM select QCOM_QMI_HELPERS help This module adds support for integrated WCN3990 chip connected diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 32ea2a8ec02b..5ff4207df66e 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -3,7 +3,8 @@ if (ARCH_QCOM || COMPILE_TEST) config PINCTRL_MSM tristate "Qualcomm core pin controller driver" - depends on GPIOLIB && (QCOM_SCM || !QCOM_SCM) #if QCOM_SCM=m this can't be =y + depends on GPIOLIB + select QCOM_SCM select PINMUX select PINCONF select GENERIC_PINCONF diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig index 33751a6a0757..3447d2744ca3 100644 --- a/drivers/pinctrl/sunxi/Kconfig +++ b/drivers/pinctrl/sunxi/Kconfig @@ -29,7 +29,7 @@ config PINCTRL_SUN6I_A31 config PINCTRL_SUN6I_A31_R bool "Support for the Allwinner A31 R-PIO" default MACH_SUN6I - depends on RESET_CONTROLLER + select RESET_CONTROLLER select PINCTRL_SUNXI config PINCTRL_SUN8I_A23 @@ -55,7 +55,7 @@ config PINCTRL_SUN8I_A83T_R config PINCTRL_SUN8I_A23_R bool "Support for the Allwinner A23 and A33 R-PIO" default MACH_SUN8I - depends on RESET_CONTROLLER + select RESET_CONTROLLER select PINCTRL_SUNXI config PINCTRL_SUN8I_H3 @@ -81,7 +81,7 @@ config PINCTRL_SUN9I_A80 config PINCTRL_SUN9I_A80_R bool "Support for the Allwinner A80 R-PIO" default MACH_SUN9I - depends on RESET_CONTROLLER + select RESET_CONTROLLER select PINCTRL_SUNXI config PINCTRL_SUN50I_A64 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 7d1cabe15262..63ccb5252190 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -321,10 +321,20 @@ asmlinkage unsigned long __arm_smccc_sve_check(unsigned long x0); * from register 0 to 3 on return from the SMC instruction. An optional * quirk structure provides vendor specific behavior. */ +#ifdef CONFIG_HAVE_ARM_SMCCC asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); +#else +static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, unsigned long a4, + unsigned long a5, unsigned long a6, unsigned long a7, + struct arm_smccc_res *res, struct arm_smccc_quirk *quirk) +{ + *res = (struct arm_smccc_res){}; +} +#endif /** * __arm_smccc_hvc() - make HVC calls diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index c0475d1c9885..81cad9e1e412 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -61,7 +61,6 @@ enum qcom_scm_ice_cipher { #define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE) #define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC) -#if IS_ENABLED(CONFIG_QCOM_SCM) extern bool qcom_scm_is_available(void); extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); @@ -115,74 +114,4 @@ extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, extern int qcom_scm_lmh_profile_change(u32 profile_id); extern bool qcom_scm_lmh_dcvsh_available(void); -#else - -#include <linux/errno.h> - -static inline bool qcom_scm_is_available(void) { return false; } - -static inline int qcom_scm_set_cold_boot_addr(void *entry, - const cpumask_t *cpus) { return -ENODEV; } -static inline int qcom_scm_set_warm_boot_addr(void *entry, - const cpumask_t *cpus) { return -ENODEV; } -static inline void qcom_scm_cpu_power_down(u32 flags) {} -static inline u32 qcom_scm_set_remote_state(u32 state,u32 id) - { return -ENODEV; } - -static inline int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, - size_t size) { return -ENODEV; } -static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, - phys_addr_t size) { return -ENODEV; } -static inline int qcom_scm_pas_auth_and_reset(u32 peripheral) - { return -ENODEV; } -static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; } -static inline bool qcom_scm_pas_supported(u32 peripheral) { return false; } - -static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val) - { return -ENODEV; } -static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val) - { return -ENODEV; } - -static inline bool qcom_scm_restore_sec_cfg_available(void) { return false; } -static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) - { return -ENODEV; } -static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) - { return -ENODEV; } -static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) - { return -ENODEV; } -extern inline int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size, - u32 cp_nonpixel_start, - u32 cp_nonpixel_size) - { return -ENODEV; } -static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, - unsigned int *src, const struct qcom_scm_vmperm *newvm, - unsigned int dest_cnt) { return -ENODEV; } - -static inline bool qcom_scm_ocmem_lock_available(void) { return false; } -static inline int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset, - u32 size, u32 mode) { return -ENODEV; } -static inline int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, - u32 offset, u32 size) { return -ENODEV; } - -static inline bool qcom_scm_ice_available(void) { return false; } -static inline int qcom_scm_ice_invalidate_key(u32 index) { return -ENODEV; } -static inline int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size, - enum qcom_scm_ice_cipher cipher, - u32 data_unit_size) { return -ENODEV; } - -static inline bool qcom_scm_hdcp_available(void) { return false; } -static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, - u32 *resp) { return -ENODEV; } - -static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en) - { return -ENODEV; } - -static inline int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, - u64 limit_node, u32 node_id, u64 version) - { return -ENODEV; } - -static inline int qcom_scm_lmh_profile_change(u32 profile_id) { return -ENODEV; } - -static inline bool qcom_scm_lmh_dcvsh_available(void) { return -ENODEV; } -#endif #endif