@@ -483,8 +483,11 @@ int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
{
struct ar9003_rxs *rxsp = buf_addr;
unsigned int phyerr;
+ /* status12 and status13 are only present in ar9300_rxs V2. */
+ u32 last_status =
+ AR_SREV_AR9003_RXS_V2(ah) ? rxsp->status13 : rxsp->status11;
- if ((rxsp->status11 & AR_RxDone) == 0)
+ if ((last_status & AR_RxDone) == 0)
return -EINPROGRESS;
if (MS(rxsp->ds_info, AR_DescId) != 0x168c)
@@ -510,17 +513,17 @@ int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
rxs->rs_rssi_ext[1] = MS(rxsp->status5, AR_RxRSSIAnt11);
rxs->rs_rssi_ext[2] = MS(rxsp->status5, AR_RxRSSIAnt12);
- if (rxsp->status11 & AR_RxKeyIdxValid)
- rxs->rs_keyix = MS(rxsp->status11, AR_KeyIdx);
+ if (last_status & AR_RxKeyIdxValid)
+ rxs->rs_keyix = MS(last_status, AR_KeyIdx);
else
rxs->rs_keyix = ATH9K_RXKEYIX_INVALID;
rxs->rs_rate = MS(rxsp->status1, AR_RxRate);
rxs->rs_more = (rxsp->status2 & AR_RxMore) ? 1 : 0;
- rxs->rs_firstaggr = (rxsp->status11 & AR_RxFirstAggr) ? 1 : 0;
- rxs->rs_isaggr = (rxsp->status11 & AR_RxAggr) ? 1 : 0;
- rxs->rs_moreaggr = (rxsp->status11 & AR_RxMoreAggr) ? 1 : 0;
+ rxs->rs_firstaggr = (last_status & AR_RxFirstAggr) ? 1 : 0;
+ rxs->rs_isaggr = (last_status & AR_RxAggr) ? 1 : 0;
+ rxs->rs_moreaggr = (last_status & AR_RxMoreAggr) ? 1 : 0;
rxs->rs_antenna = (MS(rxsp->status4, AR_RxAntenna) & 0x7);
rxs->enc_flags |= (rxsp->status4 & AR_GI) ? RX_ENC_FLAG_SHORT_GI : 0;
rxs->enc_flags |=
@@ -533,16 +536,16 @@ int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
rxs->evm3 = rxsp->status9;
rxs->evm4 = (rxsp->status10 & 0xffff);
- if (rxsp->status11 & AR_PreDelimCRCErr)
+ if (last_status & AR_PreDelimCRCErr)
rxs->rs_flags |= ATH9K_RX_DELIM_CRC_PRE;
- if (rxsp->status11 & AR_PostDelimCRCErr)
+ if (last_status & AR_PostDelimCRCErr)
rxs->rs_flags |= ATH9K_RX_DELIM_CRC_POST;
- if (rxsp->status11 & AR_DecryptBusyErr)
+ if (last_status & AR_DecryptBusyErr)
rxs->rs_flags |= ATH9K_RX_DECRYPT_BUSY;
- if ((rxsp->status11 & AR_RxFrameOK) == 0) {
+ if ((last_status & AR_RxFrameOK) == 0) {
/*
* AR_CRCErr will bet set to true if we're on the last
* subframe and the AR_PostDelimCRCErr is caught.
@@ -551,14 +554,14 @@ int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
* possibly be reviewing the last subframe. AR_CRCErr
* is the CRC of the actual data.
*/
- if (rxsp->status11 & AR_CRCErr)
+ if (last_status & AR_CRCErr)
rxs->rs_status |= ATH9K_RXERR_CRC;
- else if (rxsp->status11 & AR_DecryptCRCErr)
+ else if (last_status & AR_DecryptCRCErr)
rxs->rs_status |= ATH9K_RXERR_DECRYPT;
- else if (rxsp->status11 & AR_MichaelErr)
+ else if (last_status & AR_MichaelErr)
rxs->rs_status |= ATH9K_RXERR_MIC;
- if (rxsp->status11 & AR_PHYErr) {
- phyerr = MS(rxsp->status11, AR_PHYErrCode);
+ if (last_status & AR_PHYErr) {
+ phyerr = MS(last_status, AR_PHYErrCode);
/*
* If we reach a point here where AR_PostDelimCRCErr is
* true it implies we're *not* on the last subframe. In
@@ -573,7 +576,7 @@ int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
* delimiter for an A-MPDU subframe (0x4E = 'N' ASCII).
*/
if ((phyerr == ATH9K_PHYERR_OFDM_RESTART) &&
- (rxsp->status11 & AR_PostDelimCRCErr)) {
+ (last_status & AR_PostDelimCRCErr)) {
rxs->rs_phyerr = 0;
} else {
rxs->rs_status |= ATH9K_RXERR_PHY;
@@ -582,7 +585,7 @@ int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
}
}
- if (rxsp->status11 & AR_KeyMiss)
+ if (last_status & AR_KeyMiss)
rxs->rs_status |= ATH9K_RXERR_KEYMISS;
return 0;
@@ -65,8 +65,14 @@ struct ar9003_rxs {
u32 status9;
u32 status10;
u32 status11;
+ /* status12 and status13 are only present in ar9003_rxs V2. */
+ u32 status12;
+ u32 status13;
} __packed __aligned(4);
+#define AR9003_RXS_SIZE_V1 (12 * sizeof(u32))
+#define AR9003_RXS_SIZE_V2 (sizeof(struct ar9003_rxs))
+
/* Transmit Control Descriptor */
struct ar9003_txc {
u32 info; /* descriptor information */
@@ -2621,7 +2621,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH;
pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH;
- pCap->rx_status_len = sizeof(struct ar9003_rxs);
+ pCap->rx_status_len = AR_SREV_AR9003_RXS_V2(ah) ?
+ AR9003_RXS_SIZE_V2 :
+ AR9003_RXS_SIZE_V1;
pCap->tx_desc_len = sizeof(struct ar9003_txc);
pCap->txs_len = sizeof(struct ar9003_txs);
} else {
@@ -999,6 +999,7 @@
#define AR_SREV_SOC(_ah) \
(AR_SREV_9340(_ah) || AR_SREV_9531(_ah) || AR_SREV_9550(_ah) || \
AR_SREV_9561(_ah) || AR_SREV_5502(_ah))
+#define AR_SREV_AR9003_RXS_V2(_ah) (AR_SREV_5502(_ah))
/* NOTE: When adding chips newer than Peacock, add chip check here */
#define AR_SREV_9580_10_OR_LATER(_ah) \