From patchwork Fri Sep 21 13:57:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 10610063 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E664E6CB for ; Fri, 21 Sep 2018 13:58:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D69F62DCB3 for ; Fri, 21 Sep 2018 13:58:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CAD242DCD7; Fri, 21 Sep 2018 13:58:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5BA0F2DCB3 for ; Fri, 21 Sep 2018 13:58:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389621AbeIUTrc (ORCPT ); Fri, 21 Sep 2018 15:47:32 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:34306 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728365AbeIUTrc (ORCPT ); Fri, 21 Sep 2018 15:47:32 -0400 Received: by mail-wr1-f67.google.com with SMTP id t15so5059427wrx.1 for ; Fri, 21 Sep 2018 06:58:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HZRbarBmj5/OWI3I13jlCieHNAaXpZPyVNtQvMJ1JcA=; b=R7UvH2T7Tob61hgya1gGJnBp6sXaaWTXc+8pLvHNcnQBA/gluD1fkIWr1AYUHb78cd w7aJuCf4a4ReCbJvKER6uuXVCEa1/rU6qbeOrKhVJZ1A8viHF5C5QtLLFh7rYELREG+o oNf47VAq5y//tXIs93Q1cVauOXn6K0nRSkxtPjrGGwen5IENQ3VarslHhmFLNsivInUK JYGCv7hDrSW/0uKuXHJqVkIcg2+gmE8OkI+ZETsKVLTRM5FH+EJ731/v77OsWNoGO8li w7jOaaIwEbH3MHZ1MHIF8as8fawUyNfDTvI2AnjwH7+TB0zB+lLIeJTU6/syRVkwh7S1 Oz7g== X-Gm-Message-State: APzg51AQ0ct42P4Bfj05Qb0NqypdtcjlOgL9vJqnO3YlonyIhxOFtgau kIHc49hTg6pP9BliJa3MmrZDWoxdzfU= X-Google-Smtp-Source: ANB0VdY0ivWGK60GIkbPWBoYXiqQH+372uI4SHzGsimz1ifGNjimB3R5FnPe5K90FsL8bbtBaco4YQ== X-Received: by 2002:adf:90c9:: with SMTP id i67-v6mr12809350wri.181.1537538311064; Fri, 21 Sep 2018 06:58:31 -0700 (PDT) Received: from localhost.localdomain.com (nat-pool-mxp-t.redhat.com. [149.6.153.186]) by smtp.gmail.com with ESMTPSA id q13-v6sm9077190wro.56.2018.09.21.06.58.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 21 Sep 2018 06:58:30 -0700 (PDT) From: Lorenzo Bianconi To: nbd@nbd.name Cc: linux-wireless@vger.kernel.org Subject: [PATCH] mt76x2: fix tx power configuration for VHT mcs 9 Date: Fri, 21 Sep 2018 15:57:50 +0200 Message-Id: <4e0f2495ae0d8effa82b8deae1c35b9abc0a5a2a.1537538173.git.lorenzo.bianconi@redhat.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix tx power configuration for VHT 1SS/STBC mcs 9 since in MT_TX_PWR_CFG_{8,9} mcs 8,9 bits are GENMASK(21,16) and GENMASK(29,24) while GENMASK(15,6) are marked as reserved Fixes: 7bc04215a66b ("mt76: add driver code for MT76x2e") Signed-off-by: Lorenzo Bianconi --- drivers/net/wireless/mediatek/mt76/mt76x2_phy_common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2_phy_common.c b/drivers/net/wireless/mediatek/mt76/mt76x2_phy_common.c index 3b704a70fad1..a24243df0066 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2_phy_common.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2_phy_common.c @@ -233,9 +233,9 @@ void mt76x2_phy_set_txpower(struct mt76x2_dev *dev) mt76_wr(dev, MT_TX_PWR_CFG_7, mt76x2_tx_power_mask(t.ofdm[6], t.vht[8], t.ht[6], t.vht[8])); mt76_wr(dev, MT_TX_PWR_CFG_8, - mt76x2_tx_power_mask(t.ht[14], t.vht[8], t.vht[8], 0)); + mt76x2_tx_power_mask(t.ht[14], 0, t.vht[8], t.vht[8])); mt76_wr(dev, MT_TX_PWR_CFG_9, - mt76x2_tx_power_mask(t.ht[6], t.vht[8], t.vht[8], 0)); + mt76x2_tx_power_mask(t.ht[6], 0, t.vht[8], t.vht[8])); } EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower);