@@ -95,13 +95,6 @@ static bool sh_pfc_gpio_is_pin(struct sh_pfc *pfc, unsigned int gpio)
(pfc->info->pins[gpio].enum_id != 0);
}
-static bool sh_pfc_gpio_is_function(struct sh_pfc *pfc, unsigned int gpio)
-{
- return (gpio >= pfc->info->nr_pins) &&
- (gpio < pfc->info->nr_pins + pfc->info->nr_func_gpios) &&
- (pfc->info->func_gpios[gpio - pfc->info->nr_pins].enum_id != 0);
-}
-
static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
unsigned long reg_width)
{
@@ -350,41 +343,30 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
return -1;
}
-static int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
- pinmux_enum_t *enum_idp)
+static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
+ pinmux_enum_t *enum_idp)
{
pinmux_enum_t *data = pfc->info->gpio_data;
- pinmux_enum_t enum_id;
int k;
- if (sh_pfc_gpio_is_pin(pfc, gpio)) {
- enum_id = pfc->info->pins[gpio].enum_id;
- } else if (sh_pfc_gpio_is_function(pfc, gpio)) {
- unsigned int offset = gpio - pfc->info->nr_pins;
- enum_id = pfc->info->func_gpios[offset].enum_id;
- } else {
- pr_err("non data/mark enum_id for gpio %d\n", gpio);
- return -1;
- }
-
if (pos) {
*enum_idp = data[pos + 1];
return pos + 1;
}
for (k = 0; k < pfc->info->gpio_data_size; k++) {
- if (data[k] == enum_id) {
+ if (data[k] == mark) {
*enum_idp = data[k + 1];
return k + 1;
}
}
- pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
+ pr_err("cannot locate data/mark enum_id for mark %d\n", mark);
return -1;
}
-int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
- int cfg_mode)
+int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type,
+ int cfg_mode)
{
struct pinmux_cfg_reg *cr = NULL;
pinmux_enum_t enum_id;
@@ -423,7 +405,7 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
field = 0;
value = 0;
while (1) {
- pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id);
+ pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id);
if (pos <= 0)
goto out_err;
@@ -49,8 +49,8 @@ void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
unsigned long value);
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
struct pinmux_data_reg **drp, int *bitp);
-int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
- int cfg_mode);
+int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type,
+ int cfg_mode);
extern struct sh_pfc_soc_info r8a7740_pinmux_info;
extern struct sh_pfc_soc_info r8a7779_pinmux_info;
@@ -135,23 +135,21 @@ static void gpio_pin_setup(struct sh_pfc_chip *chip)
static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
{
struct sh_pfc *pfc = gpio_to_pfc(gc);
- unsigned int gpio = gc->base + offset;
+ unsigned int mark = pfc->info->func_gpios[offset].enum_id;
unsigned long flags;
int ret = -EINVAL;
pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n");
- if (pfc->info->func_gpios[offset].enum_id == 0)
+ if (mark == 0)
return ret;
spin_lock_irqsave(&pfc->lock, flags);
- if (sh_pfc_config_gpio(pfc, gpio, PINMUX_TYPE_FUNCTION,
- GPIO_CFG_DRYRUN))
+ if (sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_DRYRUN))
goto done;
- if (sh_pfc_config_gpio(pfc, gpio, PINMUX_TYPE_FUNCTION,
- GPIO_CFG_REQ))
+ if (sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_REQ))
goto done;
ret = 0;
@@ -164,12 +162,12 @@ done:
static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
{
struct sh_pfc *pfc = gpio_to_pfc(gc);
- unsigned int gpio = gc->base + offset;
+ unsigned int mark = pfc->info->func_gpios[offset].enum_id;
unsigned long flags;
spin_lock_irqsave(&pfc->lock, flags);
- sh_pfc_config_gpio(pfc, gpio, PINMUX_TYPE_FUNCTION, GPIO_CFG_FREE);
+ sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_FREE);
spin_unlock_irqrestore(&pfc->lock, flags);
}
@@ -119,6 +119,7 @@ static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
int new_type)
{
+ unsigned int mark = pfc->info->pins[offset].enum_id;
unsigned long flags;
int pinmux_type;
int ret = -EINVAL;
@@ -137,7 +138,7 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
case PINMUX_TYPE_INPUT:
case PINMUX_TYPE_INPUT_PULLUP:
case PINMUX_TYPE_INPUT_PULLDOWN:
- sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
+ sh_pfc_config_mux(pfc, mark, pinmux_type, GPIO_CFG_FREE);
break;
default:
goto err;
@@ -146,15 +147,13 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
/*
* Dry run
*/
- if (sh_pfc_config_gpio(pfc, offset, new_type,
- GPIO_CFG_DRYRUN) != 0)
+ if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_DRYRUN) != 0)
goto err;
/*
* Request
*/
- if (sh_pfc_config_gpio(pfc, offset, new_type,
- GPIO_CFG_REQ) != 0)
+ if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_REQ) != 0)
goto err;
pfc->info->pins[offset].flags &= ~PINMUX_FLAG_TYPE;
@@ -214,7 +213,8 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
- sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
+ sh_pfc_config_mux(pfc, pfc->info->pins[offset].enum_id, pinmux_type,
+ GPIO_CFG_FREE);
spin_unlock_irqrestore(&pfc->lock, flags);
}