From patchwork Fri Mar 29 02:44:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 2363211 Return-Path: X-Original-To: patchwork-ltsi-dev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) by patchwork1.kernel.org (Postfix) with ESMTP id E07103FD40 for ; Fri, 29 Mar 2013 02:57:12 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [IPv6:::1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 39A04DE4; Fri, 29 Mar 2013 02:47:46 +0000 (UTC) X-Original-To: ltsi-dev@lists.linuxfoundation.org Delivered-To: ltsi-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTP id 37199E0E for ; Fri, 29 Mar 2013 02:47:43 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from kirsty.vergenet.net (kirsty.vergenet.net [202.4.237.240]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 67F2020128 for ; Fri, 29 Mar 2013 02:47:39 +0000 (UTC) Received: from ayumi.akashicho.tokyo.vergenet.net (p8120-ipbfp1001kobeminato.hyogo.ocn.ne.jp [118.10.137.120]) by kirsty.vergenet.net (Postfix) with ESMTP id 19AF12C6A03; Fri, 29 Mar 2013 13:46:00 +1100 (EST) Received: by ayumi.akashicho.tokyo.vergenet.net (Postfix, from userid 7100) id B905FEDEA2C; Fri, 29 Mar 2013 11:45:58 +0900 (JST) From: Simon Horman To: ltsi-dev@lists.linuxfoundation.org Date: Fri, 29 Mar 2013 11:44:04 +0900 Message-Id: <1364525119-31791-316-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1364525119-31791-1-git-send-email-horms+renesas@verge.net.au> References: <1364525119-31791-1-git-send-email-horms+renesas@verge.net.au> X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RP_MATCHES_RCVD autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on smtp1.linux-foundation.org Cc: Magnus Damm Subject: [LTSI-dev] [PATCH/RFC 315/390] sh-pfc: Implement generic pinconf support X-BeenThere: ltsi-dev@lists.linuxfoundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: "A list to discuss patches, development, and other things related to the LTSI project" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: ltsi-dev-bounces@lists.linuxfoundation.org Errors-To: ltsi-dev-bounces@lists.linuxfoundation.org From: Laurent Pinchart The existing PFC pinconf implementation, tied to the PFC-specific pin types, isn't used by drivers or boards. Replace it with the generic pinconf types to implement bias (pull-up/down) setup. Other pin configuration options can be implemented later if needed. Signed-off-by: Laurent Pinchart Acked-by: Linus Walleij (cherry picked from commit c58d9c1b26e3ab2933abc7d5444e945ddad44809) Signed-off-by: Simon Horman --- drivers/pinctrl/sh-pfc/Kconfig | 1 + drivers/pinctrl/sh-pfc/pinctrl.c | 123 ++++++++++++++++++++++++++++---------- drivers/pinctrl/sh-pfc/sh_pfc.h | 16 +++++ 3 files changed, 110 insertions(+), 30 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index c3340f5..af16f8f 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -10,6 +10,7 @@ config PINCTRL_SH_PFC select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB select PINMUX select PINCONF + select GENERIC_PINCONF def_bool y help This enables pin control drivers for SH and SH Mobile platforms diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c index c150910..79fa170 100644 --- a/drivers/pinctrl/sh-pfc/pinctrl.c +++ b/drivers/pinctrl/sh-pfc/pinctrl.c @@ -24,6 +24,8 @@ #include #include "core.h" +#include "../core.h" +#include "../pinconf.h" struct sh_pfc_pin_config { u32 type; @@ -230,57 +232,118 @@ static const struct pinmux_ops sh_pfc_pinmux_ops = { .gpio_set_direction = sh_pfc_gpio_set_direction, }; +/* Check whether the requested parameter is supported for a pin. */ +static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin, + enum pin_config_param param) +{ + int idx = sh_pfc_get_pin_index(pfc, _pin); + const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + return true; + + case PIN_CONFIG_BIAS_PULL_UP: + return pin->configs & SH_PFC_PIN_CFG_PULL_UP; + + case PIN_CONFIG_BIAS_PULL_DOWN: + return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN; + + default: + return false; + } +} + static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin, unsigned long *config) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); struct sh_pfc *pfc = pmx->pfc; - int idx = sh_pfc_get_pin_index(pfc, _pin); - struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; + enum pin_config_param param = pinconf_to_config_param(*config); + unsigned long flags; + unsigned int bias; + + if (!sh_pfc_pinconf_validate(pfc, _pin, param)) + return -ENOTSUPP; - *config = cfg->type; + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_DOWN: + if (!pfc->info->ops || !pfc->info->ops->get_bias) + return -ENOTSUPP; + + spin_lock_irqsave(&pfc->lock, flags); + bias = pfc->info->ops->get_bias(pfc, _pin); + spin_unlock_irqrestore(&pfc->lock, flags); + + if (bias != param) + return -EINVAL; + + *config = 0; + break; + + default: + return -ENOTSUPP; + } return 0; } -static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, +static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin, unsigned long config) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); + struct sh_pfc *pfc = pmx->pfc; + enum pin_config_param param = pinconf_to_config_param(config); + unsigned long flags; - /* Validate the new type */ - if (config >= PINMUX_FLAG_TYPE) - return -EINVAL; + if (!sh_pfc_pinconf_validate(pfc, _pin, param)) + return -ENOTSUPP; - return sh_pfc_reconfig_pin(pmx, pin, config); + switch (param) { + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_DOWN: + case PIN_CONFIG_BIAS_DISABLE: + if (!pfc->info->ops || !pfc->info->ops->set_bias) + return -ENOTSUPP; + + spin_lock_irqsave(&pfc->lock, flags); + pfc->info->ops->set_bias(pfc, _pin, param); + spin_unlock_irqrestore(&pfc->lock, flags); + + break; + + default: + return -ENOTSUPP; + } + + return 0; } -static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev, - struct seq_file *s, unsigned pin) +static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group, + unsigned long config) { - const char *pinmux_type_str[] = { - [PINMUX_TYPE_NONE] = "none", - [PINMUX_TYPE_FUNCTION] = "function", - [PINMUX_TYPE_GPIO] = "gpio", - [PINMUX_TYPE_OUTPUT] = "output", - [PINMUX_TYPE_INPUT] = "input", - [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up", - [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down", - }; - unsigned long config; - int rc; - - rc = sh_pfc_pinconf_get(pctldev, pin, &config); - if (unlikely(rc != 0)) - return; - - seq_printf(s, " %s", pinmux_type_str[config]); + struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); + const unsigned int *pins; + unsigned int num_pins; + unsigned int i; + + pins = pmx->pfc->info->groups[group].pins; + num_pins = pmx->pfc->info->groups[group].nr_pins; + + for (i = 0; i < num_pins; ++i) + sh_pfc_pinconf_set(pctldev, pins[i], config); + + return 0; } static const struct pinconf_ops sh_pfc_pinconf_ops = { - .pin_config_get = sh_pfc_pinconf_get, - .pin_config_set = sh_pfc_pinconf_set, - .pin_config_dbg_show = sh_pfc_pinconf_dbg_show, + .is_generic = true, + .pin_config_get = sh_pfc_pinconf_get, + .pin_config_set = sh_pfc_pinconf_set, + .pin_config_group_set = sh_pfc_pinconf_group_set, + .pin_config_config_dbg_show = pinconf_generic_dump_config, }; /* PFC ranges -> pinctrl pin descs */ diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index b250dac..3b785fc 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -31,9 +31,15 @@ enum { PINMUX_FLAG_TYPE, /* must be last */ }; +#define SH_PFC_PIN_CFG_INPUT (1 << 0) +#define SH_PFC_PIN_CFG_OUTPUT (1 << 1) +#define SH_PFC_PIN_CFG_PULL_UP (1 << 2) +#define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3) + struct sh_pfc_pin { const pinmux_enum_t enum_id; const char *name; + unsigned int configs; }; #define SH_PFC_PIN_GROUP(n) \ @@ -120,8 +126,18 @@ struct pinmux_range { pinmux_enum_t force; }; +struct sh_pfc; + +struct sh_pfc_soc_operations { + unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin); + void (*set_bias)(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias); +}; + struct sh_pfc_soc_info { const char *name; + const struct sh_pfc_soc_operations *ops; + struct pinmux_range input; struct pinmux_range input_pd; struct pinmux_range input_pu;