From patchwork Thu Aug 28 07:04:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 4797491 Return-Path: X-Original-To: patchwork-ltsi-dev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 35FAE9F375 for ; Thu, 28 Aug 2014 08:09:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3643B2017D for ; Thu, 28 Aug 2014 08:09:42 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4176B2016C for ; Thu, 28 Aug 2014 08:09:41 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 3F5201262; Thu, 28 Aug 2014 07:30:56 +0000 (UTC) X-Original-To: ltsi-dev@lists.linuxfoundation.org Delivered-To: ltsi-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id AFBD51289 for ; Thu, 28 Aug 2014 07:30:49 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from kirsty.vergenet.net (kirsty.vergenet.net [202.4.237.240]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id DE5DA20225 for ; Thu, 28 Aug 2014 07:30:48 +0000 (UTC) Received: from ayumi.isobedori.kobe.vergenet.net (p4222-ipbfp1605kobeminato.hyogo.ocn.ne.jp [114.154.95.222]) by kirsty.vergenet.net (Postfix) with ESMTP id 68EAE267435; Thu, 28 Aug 2014 17:09:09 +1000 (EST) Received: by ayumi.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id ECF48EDE601; Thu, 28 Aug 2014 16:09:07 +0900 (JST) From: Simon Horman To: ltsi-dev@lists.linuxfoundation.org Date: Thu, 28 Aug 2014 16:04:36 +0900 Message-Id: <1409209620-24487-751-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1409209620-24487-1-git-send-email-horms+renesas@verge.net.au> References: <1409209620-24487-1-git-send-email-horms+renesas@verge.net.au> X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org Cc: Magnus Damm Subject: [LTSI-dev] [PATCH LTSI-3.14 750/894] ARM: shmobile: r8a7779: Add clocks X-BeenThere: ltsi-dev@lists.linuxfoundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: "A list to discuss patches, development, and other things related to the LTSI project" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: ltsi-dev-bounces@lists.linuxfoundation.org Errors-To: ltsi-dev-bounces@lists.linuxfoundation.org X-Virus-Scanned: ClamAV using ClamSMTP Declare all core and MSTP clocks currently used by r8a7779-based boards. Based on work by Laurent Pinchart for the r8a7790 and r8a7791 SoCs. Acked-by: Laurent Pinchart (cherry picked from commit 1e8515384bfa5efa5803a38c5ba7fecd6514c527) Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 144 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index b517c8e..5a62970 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -11,6 +11,7 @@ /include/ "skeleton.dtsi" +#include #include / { @@ -265,4 +266,147 @@ #size-cells = <0>; status = "disabled"; }; + + clocks { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* External root clock */ + extal_clk: extal_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overriden by the board. */ + clock-frequency = <0>; + clock-output-names = "extal"; + }; + + /* Special CPG clocks */ + cpg_clocks: cpg_clocks@0xe6150000 { + compatible = "renesas,r8a7779-cpg-clocks"; + reg = <0 0xffc80000 0 0x30>; + clocks = <&extal_clk>; + #clock-cells = <1>; + clock-output-names = "plla", "z", "zs", "s", + "s1", "p", "b", "out"; + }; + + /* Fixed factor clocks */ + i_clk: i_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + clock-output-names = "i"; + }; + s3_clk: s3_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + clock-output-names = "s3"; + }; + s4_clk: s4_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <16>; + clock-mult = <1>; + clock-output-names = "s4"; + }; + g_clk: g_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <24>; + clock-mult = <1>; + clock-output-names = "g"; + }; + + /* Gate clocks */ + mstp0_clks: mstp0_clks { + compatible = "renesas,r8a7779-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xffc80030 0 4>; + clocks = <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7779_CLK_HSPI R8A7779_CLK_TMU2 + R8A7779_CLK_TMU1 R8A7779_CLK_TMU0 + R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0 + R8A7779_CLK_SCIF5 R8A7779_CLK_SCIF4 + R8A7779_CLK_SCIF3 R8A7779_CLK_SCIF2 + R8A7779_CLK_SCIF1 R8A7779_CLK_SCIF0 + R8A7779_CLK_I2C3 R8A7779_CLK_I2C2 + R8A7779_CLK_I2C1 R8A7779_CLK_I2C0 + >; + clock-output-names = + "hspi", "tmu2", "tmu1", "tmu0", "hscif1", + "hscif0", "scif5", "scif4", "scif3", "scif2", + "scif1", "scif0", "i2c3", "i2c2", "i2c1", + "i2c0"; + }; + mstp1_clks: mstp1_clks { + compatible = "renesas,r8a7779-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xffc80034 0 4>, <0 0xffc80044 0 4>; + clocks = <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_S>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7779_CLK_USB01 R8A7779_CLK_USB2 + R8A7779_CLK_DU R8A7779_CLK_VIN2 + R8A7779_CLK_VIN1 R8A7779_CLK_VIN0 + R8A7779_CLK_ETHER R8A7779_CLK_SATA + R8A7779_CLK_PCIE R8A7779_CLK_VIN3 + >; + clock-output-names = + "usb01", "usb2", + "du", "vin2", + "vin1", "vin0", + "ether", "sata", + "pcie", "vin3"; + }; + mstp3_clks: mstp3_clks { + compatible = "renesas,r8a7779-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xffc8003c 0 4>; + clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, + <&s4_clk>, <&s4_clk>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7779_CLK_SDHI3 R8A7779_CLK_SDHI2 + R8A7779_CLK_SDHI1 R8A7779_CLK_SDHI0 + R8A7779_CLK_MMC1 R8A7779_CLK_MMC0 + >; + clock-output-names = + "sdhi3", "sdhi2", "sdhi1", "sdhi0", + "mmc1", "mmc0"; + }; + }; };