[0193/1094] drm/i915: remove pch_port argument form intel_enable_pipe

Commit Message

Dheeraj Jamwal Oct. 21, 2014, 10:46 a.m. UTC

From: Paulo Zanoni <[e-mail]>

Now that we pass struct intel_crtc as an argument, there's no need for
it.

Signed-off-by: Paulo Zanoni <[e-mail]>
Reviewed-by: Damien Lespiau <[e-mail]>
Signed-off-by: Daniel Vetter <[e-mail]>
(cherry picked from commit 30421c4f40b1dd03ad7d19538e29cd90962e4e53)

Signed-off-by: Dheeraj Jamwal <[e-mail]>
---
 drivers/gpu/drm/i915/intel_display.c |   15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ee71c6..c30df3f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1747,7 +1747,6 @@  static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
 /**
  * intel_enable_pipe - enable a pipe, asserting requirements
  * @crtc: crtc responsible for the pipe
- * @pch_port: on ILK+, is this pipe driving a PCH port or not
  * @dsi: output type is DSI
  * @wait_for_vblank: whether we should for a vblank or not after enabling it
  *
@@ -1755,7 +1754,7 @@  static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
  * are met, if applicable, e.g. PLL enabled, LVDS pairs enabled, etc.
  */
 static void intel_enable_pipe(struct intel_crtc *crtc,
-			      bool pch_port, bool dsi, bool wait_for_vblank)
+			      bool dsi, bool wait_for_vblank)
 {
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1786,7 +1785,7 @@  static void intel_enable_pipe(struct intel_crtc *crtc,
 		else
 			assert_pll_enabled(dev_priv, pipe);
 	else {
-		if (pch_port) {
+		if (crtc->config.has_pch_encoder) {
 			/* if driving the PCH, we need FDI enabled */
 			assert_fdi_rx_pll_enabled(dev_priv, pch_transcoder);
 			assert_fdi_tx_pll_enabled(dev_priv,
@@ -3599,8 +3598,7 @@  static void ironlake_crtc_enable(struct drm_crtc *crtc)
 	intel_crtc_load_lut(crtc);
 
 	intel_update_watermarks(crtc);
-	intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false,
-			  true);
+	intel_enable_pipe(intel_crtc, false, true);
 	intel_enable_primary_plane(dev_priv, plane, pipe);
 	intel_enable_planes(crtc);
 	intel_crtc_update_cursor(crtc, true);
@@ -3745,8 +3743,7 @@  static void haswell_crtc_enable(struct drm_crtc *crtc)
 	intel_ddi_enable_transcoder_func(crtc);
 
 	intel_update_watermarks(crtc);
-	intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false,
-			  false);
+	intel_enable_pipe(intel_crtc, false, false);
 
 	if (intel_crtc->config.has_pch_encoder)
 		lpt_pch_enable(crtc);
@@ -4171,7 +4168,7 @@  static void valleyview_crtc_enable(struct drm_crtc *crtc)
 	intel_crtc_load_lut(crtc);
 
 	intel_update_watermarks(crtc);
-	intel_enable_pipe(intel_crtc, false, is_dsi, true);
+	intel_enable_pipe(intel_crtc, is_dsi, true);
 	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
 	intel_enable_primary_plane(dev_priv, plane, pipe);
 	intel_enable_planes(crtc);
@@ -4210,7 +4207,7 @@  static void i9xx_crtc_enable(struct drm_crtc *crtc)
 	intel_crtc_load_lut(crtc);
 
 	intel_update_watermarks(crtc);
-	intel_enable_pipe(intel_crtc, false, false, true);
+	intel_enable_pipe(intel_crtc, false, true);
 	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
 	intel_enable_primary_plane(dev_priv, plane, pipe);
 	intel_enable_planes(crtc);