[0330/1094] drm/i915: check pipe power domain when reading its hw state

Commit Message

Dheeraj Jamwal Oct. 21, 2014, 10:48 a.m. UTC

From: Imre Deak <[e-mail]>

We can read out the pipe HW state only if the required power domain is
on. If not we consider the pipe to be off.

v2:
- no change
v3:
- push down the power domain checks into the specific crtc
  get_pipe_config handlers (Daniel)

Signed-off-by: Imre Deak <[e-mail]>
Reviewed-by: Jesse Barnes <[e-mail]>
[danvet: Appease checkpatch.]
Signed-off-by: Daniel Vetter <[e-mail]>
(cherry picked from commit b5482bd0ffefadf314098d7fae445aac9f3a0411)

Signed-off-by: Dheeraj Jamwal <[e-mail]>
---
 drivers/gpu/drm/i915/intel_display.c |    8 ++++++++
 1 file changed, 8 insertions(+)

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3b75bf0..1dc62ca 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5611,6 +5611,10 @@  static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t tmp;
 
+	if (!intel_display_power_enabled(dev_priv,
+					 POWER_DOMAIN_PIPE(crtc->pipe)))
+		return false;
+
 	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
 
@@ -6981,6 +6985,10 @@  static bool haswell_get_pipe_config(struct intel_crtc *crtc,
 	enum intel_display_power_domain pfit_domain;
 	uint32_t tmp;
 
+	if (!intel_display_power_enabled(dev_priv,
+					 POWER_DOMAIN_PIPE(crtc->pipe)))
+		return false;
+
 	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;