@@ -845,7 +845,7 @@ static int i915_runtime_suspend(struct device *device)
DRM_DEBUG_KMS("Suspending device\n");
if (HAS_PC8(dev))
- __hsw_do_enable_pc8(dev_priv);
+ hsw_enable_pc8(dev_priv);
i915_gem_release_all_mmaps(dev_priv);
@@ -879,7 +879,7 @@ static int i915_runtime_resume(struct device *device)
dev_priv->pm.suspended = false;
if (HAS_PC8(dev))
- __hsw_do_disable_pc8(dev_priv);
+ hsw_disable_pc8(dev_priv);
DRM_DEBUG_KMS("Device resumed\n");
return 0;
@@ -7022,7 +7022,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
-void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv)
+void hsw_enable_pc8(struct drm_i915_private *dev_priv)
{
struct drm_device *dev = dev_priv->dev;
uint32_t val;
@@ -7042,7 +7042,7 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv)
hsw_disable_lcpll(dev_priv, true, true);
}
-void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv)
+void hsw_disable_pc8(struct drm_i915_private *dev_priv)
{
struct drm_device *dev = dev_priv->dev;
uint32_t val;
@@ -725,8 +725,8 @@ unsigned long intel_gen4_compute_page_offset(int *x, int *y,
unsigned int bpp,
unsigned int pitch);
void intel_display_handle_reset(struct drm_device *dev);
-void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv);
-void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv);
+void hsw_enable_pc8(struct drm_i915_private *dev_priv);
+void hsw_disable_pc8(struct drm_i915_private *dev_priv);
void intel_dp_get_m_n(struct intel_crtc *crtc,
struct intel_crtc_config *pipe_config);
int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);