From patchwork Mon Aug 16 16:07:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Kubalewski X-Patchwork-Id: 12438827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B248EC4320A for ; Mon, 16 Aug 2021 16:17:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9AEE460F58 for ; Mon, 16 Aug 2021 16:17:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229795AbhHPQSI (ORCPT ); Mon, 16 Aug 2021 12:18:08 -0400 Received: from mga09.intel.com ([134.134.136.24]:19482 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229556AbhHPQSH (ORCPT ); Mon, 16 Aug 2021 12:18:07 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10078"; a="215889338" X-IronPort-AV: E=Sophos;i="5.84,326,1620716400"; d="scan'208";a="215889338" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2021 09:17:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,326,1620716400"; d="scan'208";a="487523670" Received: from amlin-018-053.igk.intel.com ([10.102.18.53]) by fmsmga008.fm.intel.com with ESMTP; 16 Aug 2021 09:17:31 -0700 From: Arkadiusz Kubalewski To: linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: jesse.brandeburg@intel.com, anthony.l.nguyen@intel.com, davem@davemloft.net, kuba@kernel.org, richardcochran@gmail.com, shuah@kernel.org, arkadiusz.kubalewski@intel.com, arnd@arndb.de, nikolay@nvidia.com, cong.wang@bytedance.com, colin.king@canonical.com, gustavoars@kernel.org Subject: [RFC net-next 0/7] Add basic SyncE interfaces Date: Mon, 16 Aug 2021 18:07:10 +0200 Message-Id: <20210816160717.31285-1-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC SyncE - Synchronous Ethernet is defined in ITU-T Rec. G.8264 (https://www.itu.int/rec/T-REC-G.8264) SyncE allows synchronizing the frequency of ethernet PHY clock signal (the frequency used to send the data onto wire), to some reference clock signal. Multiple reference clock sources can be available. PHY ports recover the frequency at which the transmitter sent the data on the RX side. Alternatively, we can use external sources like 1PPS GPS, etc. This patch series introduces basic interfaces for communication with a SyncE capable device. The first part of the interface allows acquiring the synchronization state of DPLL (Digital Phase Locked Loop). DPLL LOCKED state means that the frequency generated by it is locked to the input frequency. As a result, PHYs connected to it are synchronized to the chosen input frequency signal. The second part can be used to select the port from which the clock gets recovered. Each PHY chip can have multiple pins on which the recovered clock can be propagated. For example, a SyncE-capable PHY can recover the carrier frequency of the first port, divide it internally, and output it as a reference clock on PIN 0. When such a signal is enabled, the DPLL can LOCK to the frequency recovered on PIN 0. Next steps: - Add CONFIG_SYNCE definition into Kconfig - Add more configuration interfaces. Aiming at devlink, since this would be device-wide configuration Arkadiusz Kubalewski (7): ptp: Add interface for acquiring DPLL state selftests/ptp: Add usage of PTP_DPLL_GETSTATE ioctl in testptp ice: add get_dpll_state ptp interface usage net: add ioctl interface for recover reference clock on netdev selftests/net: Add test app for SIOC{S|G}SYNCE ice: add SIOC{S|G}SYNCE interface usage to recover reference signal ice: add sysfs interface to configure PHY recovered reference signal .../net/ethernet/intel/ice/ice_adminq_cmd.h | 62 +++++ drivers/net/ethernet/intel/ice/ice_common.c | 101 ++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 9 + drivers/net/ethernet/intel/ice/ice_main.c | 4 + drivers/net/ethernet/intel/ice/ice_ptp.c | 234 +++++++++++++++++- drivers/net/ethernet/intel/ice/ice_ptp.h | 9 + drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 6 + drivers/ptp/ptp_chardev.c | 15 ++ drivers/ptp/ptp_clockmatrix.h | 12 - drivers/ptp/ptp_private.h | 2 + drivers/ptp/ptp_sysfs.c | 48 ++++ include/linux/ptp_clock_kernel.h | 9 + include/uapi/linux/net_synce.h | 21 ++ include/uapi/linux/ptp_clock.h | 27 ++ include/uapi/linux/sockios.h | 4 + net/core/dev_ioctl.c | 6 +- tools/testing/selftests/net/Makefile | 1 + tools/testing/selftests/net/phy_ref_clk.c | 138 +++++++++++ tools/testing/selftests/ptp/testptp.c | 27 +- 19 files changed, 720 insertions(+), 15 deletions(-) create mode 100644 include/uapi/linux/net_synce.h create mode 100644 tools/testing/selftests/net/phy_ref_clk.c base-commit: aba1e4adb54e020d3ca85a4df3ef0f8febe87548