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[82.81.222.124]) by smtp.gmail.com with ESMTPSA id x18-20020adfdd92000000b0020c5253d915sm11121155wrl.97.2022.05.09.07.36.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 07:36:39 -0700 (PDT) From: Josua Mayer To: netdev@vger.kernel.org Cc: alvaro.karsz@solid-run.com, Josua Mayer Subject: [PATCH v4 0/3] adin: add support for clock output Date: Mon, 9 May 2022 17:36:32 +0300 Message-Id: <20220509143635.26233-1-josua@solid-run.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220428082848.12191-1-josua@solid-run.com> References: <20220428082848.12191-1-josua@solid-run.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch series adds support for configuring the two clock outputs of adin 1200 and 1300 PHYs. Certain network controllers require an external reference clock which can be provided by the PHY. One of the replies to v1 was asking why the common clock framework isn't used. Currently no PHY driver has implemented providing a clock to the network controller. Instead they rely on vendor extensions to make the appropriate configuration. For example ar8035 uses qca,clk-out-frequency - this patchset aimed to replicate the same functionality. Finally the 125MHz free-running clock is enabled in the device-tree for SolidRun i.MX6 SoMs, to support revisions 1.9 and later, where the original phy has been replaced with an adin 1300. To avoid introducing new warning messages during boot for SoMs before rev 1.9, the status field of the new phy node is disabled by default, and will be enabled by U-Boot on demand. Changes since v3: - fix coding style violations reported by Andrew and checkpatch - changed type of adi,phy-output-reference-clock from flag to boolean Changes since v2: - set new phy node status to disabled - fix integer-as-null-pointer compiler warning Reported-by: kernel test robot Changes since v1: - renamed device-tree property and changed to enum - added device-tree property for second clock output - implemented all bits from the clock configuration register Josua Mayer (3): dt-bindings: net: adin: document phy clock output properties net: phy: adin: add support for clock output ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 .../devicetree/bindings/net/adi,adin.yaml | 17 +++++++ arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 10 +++++ drivers/net/phy/adin.c | 44 +++++++++++++++++++ 3 files changed, 71 insertions(+)