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Miller" CC: Oz Shlomo , Jiri Pirko , Roi Dayan , Vlad Buslov Subject: [PATCH net-next 0/4] net/sched: cls_api: Support hardware miss to tc action Date: Thu, 12 Jan 2023 12:58:59 +0200 Message-ID: <20230112105905.1738-1-paulb@nvidia.com> X-Mailer: git-send-email 2.30.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT016:EE_|SJ1PR12MB6170:EE_ X-MS-Office365-Filtering-Correlation-Id: ffc90ae1-a88b-4eeb-f658-08daf48c15b4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 897TlGBRyMDbA8vq5pc6gXn0qT3w/NxQiF7PpG7Ix1EZ1p6eq1MyOCcCIXRN52Uf0zMnEKBHMqXmHA0+VemooN39W2ae7Q4mIACm7ql5mfOWWJ4Ck4ueRaEOqISibtxLbOH6dclvbTN1QNT2Ulof7DXca9y/fR1xtY9HTmsJDUKKbzC0j+jd3xTdmVz5DWupZGfxBB6T00wLgXNB71mWx/7oO2NyajW0uWhYe7yOnc0SW5GPgpMYWEVQGfb3CTxssbCHy2t43gUVNfGvV1EjTT622WsAX4PWxrK59kt3ewjunQtmyvc4AEe0pMfFkknOX4wAcUBhjccZbFIIwsu3qaVb1eb+aYz8ZIjdVDidJ0O+pDFLDNYclrH6cNoCyZFDQPZgPtiSF9RuWbK6yOQEzQbhaVe3pCJUWhrq4JTkvJiUL0BLnMtE9N59lqIxTgQYZRaos1ZZ/9LViVJkjXCGgFXLUIqfg+mJSin1/vxr6hAa7lu2KKRx+VhLdsakHw6D+Fk4KOVA8Yri4jCd3WLz2NViigIoNix0g79/aPn0r/+6wDSmwX+Lu/dnj0ozW8an64ItzbbL/UmR7ny60vZpS6MIjrPktaHJvjcBqSDM22ZDbZCYha244nIEtmr8OTfJV0InAjcjz218YmSliyHOxV6/A0foZKwoS7N72+fh7W3MyvbU/4/p4r07wExdjBTfc0zJmFtoT8TlT5nOd2MaXQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(136003)(346002)(396003)(376002)(39860400002)(451199015)(40470700004)(46966006)(36840700001)(36860700001)(107886003)(6666004)(2906002)(70206006)(36756003)(4326008)(5660300002)(83380400001)(8936002)(8676002)(82740400003)(426003)(41300700001)(356005)(47076005)(478600001)(7636003)(336012)(40480700001)(26005)(70586007)(82310400005)(186003)(1076003)(40460700003)(86362001)(2616005)(316002)(54906003)(110136005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jan 2023 10:59:32.0938 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ffc90ae1-a88b-4eeb-f658-08daf48c15b4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT016.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6170 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Hi, This series adds support for hardware miss to a specific tc action instance on a filter's action list. The mlx5 driver patch (besides the refactors) shows its usage instead of using just chain restore. This miss to action supports partial offload of a filter's action list, and and let software continue processing where hardware left off. Example is the CT action, where new connections need to be handled in software. And if there is a packet modifying action before the CT action, then restoring only the chain on misses might cause the rule to not re-execute the relevant filter in software. Consider the following scenario: $ tc filter add dev dev1 ingress chain 0 proto ip flower \ ct_state -trk dst_mac fe:50:56:26:13:7d \ action pedit ex munge eth dst aa:bb:cc:dd:ee:01 \ action ct \ action goto chain 1 $ tc filter add dev dev1 ingress chain 1 proto ip flower \ ct_state +trk+est \ action mirred egress redirect dev ... $ tc filter add dev dev1 ingress chain 1 proto ip flower \ ct_state +trk+new \ action ct commit \ action mirred egress redirect dev dev2 $ tc filter add dev dev2 ingress chain 0 proto ip flower \ action ct \ action mirred egress redirect dev dev1 A packet doing the pedit in hardware (setting dst_mac to aa:bb:cc:dd:ee:01), missing in the ct action, and restarting in chain 0 in software will fail matching the original dst_mac in the flower filter on chain 0. The above scenario is supported in mlx5 driver by reordering the actions so ct will be done in hardware before the pedit action, but some packet modifications can't be reordered in regards to the ct action. An example of that is a modification to the tuple fields (e.g action pedit ex munge ip dst 1.1.1.1) since it affects the ct action's result (as it does lookup based on ip). Paul Blakey (6): net/sched: cls_api: Support hardware miss to tc action net/sched: flower: Move filter handle initialization earlier net/sched: flower: Support hardware miss to tc action net/mlx5: Refactor tc miss handling to a single function net/mlx5e: Rename CHAIN_TO_REG to MAPPED_OBJ_TO_REG net/mlx5: TC, Set CT miss to the specific ct action instance .../ethernet/mellanox/mlx5/core/en/rep/tc.c | 225 ++------------ .../mellanox/mlx5/core/en/tc/sample.c | 2 +- .../ethernet/mellanox/mlx5/core/en/tc_ct.c | 32 +- .../ethernet/mellanox/mlx5/core/en/tc_ct.h | 2 + .../net/ethernet/mellanox/mlx5/core/en_rx.c | 4 +- .../net/ethernet/mellanox/mlx5/core/en_tc.c | 276 ++++++++++++++++-- .../net/ethernet/mellanox/mlx5/core/en_tc.h | 21 +- .../net/ethernet/mellanox/mlx5/core/eswitch.h | 2 + .../mellanox/mlx5/core/lib/fs_chains.c | 14 +- include/linux/skbuff.h | 6 +- include/net/flow_offload.h | 1 + include/net/pkt_cls.h | 20 +- include/net/sch_generic.h | 2 + net/openvswitch/flow.c | 2 +- net/sched/act_api.c | 2 +- net/sched/cls_api.c | 208 ++++++++++++- net/sched/cls_flower.c | 75 +++-- 17 files changed, 580 insertions(+), 314 deletions(-)