Message ID | 20230606092107.764621-1-jiawenwu@trustnetic.com (mailing list archive) |
---|---|
Headers | show |
Series | TXGBE PHYLINK support | expand |
On Tue, Jun 06, 2023 at 05:20:59PM +0800, Jiawen Wu wrote: > Implement I2C, SFP, GPIO and PHYLINK to setup TXGBE link. > > Because our I2C and PCS are based on Synopsys Designware IP-core, extend > the i2c-designware and pcs-xpcs driver to realize our functions. I have browsed through the series and I didn't spot issues that stand out for a guy that is not an expert in these regions. Consider my: Reviewed-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com> not a big fan of devm_ usage though. > > v11 -> v12: > - split I2C designware patch (2/9) to I2C tree, repost remaining 8 > patches > > v10 -> v11: > - add gc->label NULL check > - rebase on merging of wangxun patches > > v9 -> v10: > - clear I2C device model flags > - change the order of header files > - use xpcs_create_mdiodev() > - fix Kconfig warning > > v8 -> v9: > - rename swnode property for specific I2C platform device > - add ".fast_io = true" for I2C regmap > - use raw_spinlock_t for GPIO reg lock and adjust its position > - remove redundant txgbe->mdiodev > - keep reverse x-mass tree order > - other minor style changes > > v7 -> v8: > - use macro defined I2C FIFO depth instead of magic number > - fix return code of clock create failure > - add spinlock for writing GPIO registers > - implement triggering GPIO interrupts for both-edge type > - remove the condition that enables interrupts > - add mii bus check for PCS device > - other minor style changes > > v6 -> v7: > - change swnode property of I2C platform to be boolean > - use device_property_present() to match I2C device data > > v5 -> v6: > - fix to set error code if pointer of txgbe is NULL > - change "if" to "switch" for *_i2c_dw_xfer_quirk() > - rename property for I2C device flag > - use regmap to access I2C mem region > - use DEFINE_RES_IRQ() > - use phylink_mii_c45_pcs_get_state() for DW_XPCS_10GBASER > > v4 -> v5: > - add clock register > - delete i2c-dw.h with platform data > - introduce property "i2c-dw-flags" to match device flags > - get resource from platform info to do ioremap > - rename quirk functions in i2c-designware-*.c > - fix calling txgbe_phylink_init() > > v3 -> v4: > - modify I2C transfer to be generic implementation > - avoid to read DW_IC_COMP_PARAM_1 > - remove redundant "if" statement > - add specific labels to handle error in txgbe_init_phy(), and remove > "if" conditions in txgbe_remove_phy() > > v2 -> v3: > - delete own I2C bus master driver, support it in i2c-designware > - delete own PCS functions, remove pma configuration and 1000BASE-X mode > - add basic function for 10GBASE-R interface in pcs-xpcs > - add helper to get txgbe pointer from netdev > > v1 -> v2: > - add comments to indicate GPIO lines > - add I2C write operation support > - modify GPIO direction functions > - rename functions related to PHY interface > - add condition on interface changing to re-config PCS > - add to set advertise and fix to get status for 1000BASE-X mode > - other redundant codes remove > > Jiawen Wu (8): > net: txgbe: Add software nodes to support phylink > net: txgbe: Register fixed rate clock > net: txgbe: Register I2C platform device > net: txgbe: Add SFP module identify > net: txgbe: Support GPIO to SFP socket > net: pcs: Add 10GBASE-R mode for Synopsys Designware XPCS > net: txgbe: Implement phylink pcs > net: txgbe: Support phylink MAC layer > > drivers/net/ethernet/wangxun/Kconfig | 10 + > drivers/net/ethernet/wangxun/libwx/wx_lib.c | 3 +- > drivers/net/ethernet/wangxun/libwx/wx_type.h | 4 + > drivers/net/ethernet/wangxun/txgbe/Makefile | 1 + > .../ethernet/wangxun/txgbe/txgbe_ethtool.c | 28 + > .../net/ethernet/wangxun/txgbe/txgbe_main.c | 65 +- > .../net/ethernet/wangxun/txgbe/txgbe_phy.c | 673 ++++++++++++++++++ > .../net/ethernet/wangxun/txgbe/txgbe_phy.h | 10 + > .../net/ethernet/wangxun/txgbe/txgbe_type.h | 89 +++ > drivers/net/pcs/pcs-xpcs.c | 30 + > include/linux/pcs/pcs-xpcs.h | 1 + > 11 files changed, 881 insertions(+), 33 deletions(-) > create mode 100644 drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c > create mode 100644 drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h > > -- > 2.27.0 > >
Hello: This series was applied to netdev/net-next.git (main) by Paolo Abeni <pabeni@redhat.com>: On Tue, 6 Jun 2023 17:20:59 +0800 you wrote: > Implement I2C, SFP, GPIO and PHYLINK to setup TXGBE link. > > Because our I2C and PCS are based on Synopsys Designware IP-core, extend > the i2c-designware and pcs-xpcs driver to realize our functions. > > v11 -> v12: > - split I2C designware patch (2/9) to I2C tree, repost remaining 8 > patches > > [...] Here is the summary with links: - [net-next,v12,1/8] net: txgbe: Add software nodes to support phylink https://git.kernel.org/netdev/net-next/c/c3e382ad6d15 - [net-next,v12,2/8] net: txgbe: Register fixed rate clock https://git.kernel.org/netdev/net-next/c/b63f20485e43 - [net-next,v12,3/8] net: txgbe: Register I2C platform device https://git.kernel.org/netdev/net-next/c/c625e72561f6 - [net-next,v12,4/8] net: txgbe: Add SFP module identify https://git.kernel.org/netdev/net-next/c/04d94236182e - [net-next,v12,5/8] net: txgbe: Support GPIO to SFP socket https://git.kernel.org/netdev/net-next/c/b83c37315a62 - [net-next,v12,6/8] net: pcs: Add 10GBASE-R mode for Synopsys Designware XPCS https://git.kernel.org/netdev/net-next/c/af8de1e307bf - [net-next,v12,7/8] net: txgbe: Implement phylink pcs https://git.kernel.org/netdev/net-next/c/854cace61387 - [net-next,v12,8/8] net: txgbe: Support phylink MAC layer https://git.kernel.org/netdev/net-next/c/08f08f9390e4 You are awesome, thank you!