From patchwork Wed Oct 4 09:05:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Kubalewski X-Patchwork-Id: 13408477 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BABF6101E2 for ; Wed, 4 Oct 2023 09:08:32 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8165CA7; Wed, 4 Oct 2023 02:08:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696410511; x=1727946511; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Xnhts4jT97KTkayqzW35Jj64lW+7QSle6bpzAnpos0Q=; b=NSoinBiDkSJkC7ii726n9wdS43Ut/CinupBKkc/Mwn2mlvcGYlB+kQYI +/y6bAkajIey1CukpVTt25TNN3U3IlIIswVSLlChetz5IF52cLi1DO6va ixpjeaWJTv383qvspJq501gtJxZbGE77lpRn9PtpnIatkEBEIvvA+4MP/ L7q64fQCfRqDy9aO67F3bsBO/5TZsduBNQjzD8pWG3dBYmcU8T/xOLAzf Gdpc9Q1s5upjFz9Zz/U1ks/J4ZO3JejfXtTsLcrFXLwamnQ12gYAZAbnn iUhEJZzP6ehAPaIGgfqGjiugotASEf5zl1S9vjS0E0qQixKPWLnMJuq3S g==; X-IronPort-AV: E=McAfee;i="6600,9927,10852"; a="373448473" X-IronPort-AV: E=Sophos;i="6.03,199,1694761200"; d="scan'208";a="373448473" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 02:08:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10852"; a="780668465" X-IronPort-AV: E=Sophos;i="6.03,199,1694761200"; d="scan'208";a="780668465" Received: from amlin-018-114.igk.intel.com ([10.102.18.114]) by orsmga008.jf.intel.com with ESMTP; 04 Oct 2023 02:08:28 -0700 From: Arkadiusz Kubalewski To: netdev@vger.kernel.org Cc: vadim.fedorenko@linux.dev, jiri@resnulli.us, corbet@lwn.net, davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, jesse.brandeburg@intel.com, anthony.l.nguyen@intel.com, linux-doc@vger.kernel.org, intel-wired-lan@lists.osuosl.org, Arkadiusz Kubalewski Subject: [PATCH net-next v2 0/5] dpll: add phase-offset and phase-adjust Date: Wed, 4 Oct 2023 11:05:42 +0200 Message-Id: <20231004090547.1597844-1-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.38.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Improve monitoring and control over dpll devices. Allow user to receive measurement of phase difference between signals on pin and dpll (phase-offset). Allow user to receive and control adjustable value of pin's signal phase (phase-adjust). v1->v2: - improve handling for error case of requesting the phase adjust set - align handling for error case of frequency set request with the approach introduced for phase adjust Arkadiusz Kubalewski (5): dpll: docs: add support for pin signal phase offset/adjust dpll: spec: add support for pin-dpll signal phase offset/adjust dpll: netlink/core: add support for pin-dpll signal phase offset/adjust ice: dpll: implement phase related callbacks dpll: netlink/core: change pin frequency set behavior Documentation/driver-api/dpll.rst | 53 ++++- Documentation/netlink/specs/dpll.yaml | 33 +++- drivers/dpll/dpll_netlink.c | 180 +++++++++++++++-- drivers/dpll/dpll_nl.c | 8 +- drivers/dpll/dpll_nl.h | 2 +- drivers/net/ethernet/intel/ice/ice_dpll.c | 224 +++++++++++++++++++++- drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +- include/linux/dpll.h | 18 ++ include/uapi/linux/dpll.h | 8 +- 9 files changed, 514 insertions(+), 22 deletions(-)