From patchwork Fri Oct 27 23:22:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Chan X-Patchwork-Id: 13439299 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 195A33FB00 for ; Fri, 27 Oct 2023 23:23:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="Q5MJL4K9" Received: from mail-qk1-x72a.google.com (mail-qk1-x72a.google.com [IPv6:2607:f8b0:4864:20::72a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFE36C2 for ; Fri, 27 Oct 2023 16:23:33 -0700 (PDT) Received: by mail-qk1-x72a.google.com with SMTP id af79cd13be357-7789577b53fso184142185a.3 for ; Fri, 27 Oct 2023 16:23:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1698449013; x=1699053813; darn=vger.kernel.org; h=mime-version:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to; bh=0g3wnBON+VC1en3SR/wsUY3W5MPUNufy0N7dL0NGptU=; b=Q5MJL4K9xnCnX78LG5VdQPrAiOBUaaoalyAMevtxX0hgC72CvJ/d60kIfOBEyf15gv jT+nIi5fbys62EXEeER2zrBU4Bz68BWgj9xGhleid+d5fmFsCZp2ZkXrEIMMziwxwJgr dpggsdkwmtuatsLxmsLzXDhoYcAGaIP1ZrNzI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698449013; x=1699053813; h=mime-version:message-id:date:subject:cc:to:from:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=0g3wnBON+VC1en3SR/wsUY3W5MPUNufy0N7dL0NGptU=; b=edB3sk1dD6mjGSI84/8dS7OMVvPK+z5sc++cutsppRzxrvEfgwS8VhKhMc1WQyVm51 yrQecZ95nf25pXeizNogfUqq8CbTf7YJZWEmGyu6dqP/GYP3oztRZF4GL4T+hMXe8GhW rlmbFwghmfdu8RnQA6rp2KMtxyRsRvNe/d1fClZ78lP87ufF7v9mj0pSOjbVEfNYtTzB K9XcdIunY6O9RAtR1Qfzr7fjIk2wtqkLRh3Nk3I8fy6bbWbO4boAbFOPbpmXaA3olCem K+/TfXbQzbAbjhn/m90l7h0gUb70j6VTq79ybZuzCpJFs/QKnRUsu+IHTYBdE7Y96NWw FIfg== X-Gm-Message-State: AOJu0Yw/egPz82LtQlfG+z186HSDFfvgSoQNfEDKhcmhJUuhkN6Ywv0u vso7n/bW1z6xBDlDg9J6vxylow== X-Google-Smtp-Source: AGHT+IGkZs81/zoT+ryibUKYklSG5WrzogcHQySfuqmigj5909eB/7h0MFpe43tJXy8mqWdzzj3nWA== X-Received: by 2002:a05:620a:4551:b0:774:a80:3e0b with SMTP id u17-20020a05620a455100b007740a803e0bmr4883719qkp.5.1698449012576; Fri, 27 Oct 2023 16:23:32 -0700 (PDT) Received: from lvnvda5233.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id y27-20020a05620a09db00b007742ad3047asm984169qky.54.2023.10.27.16.23.31 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Oct 2023 16:23:32 -0700 (PDT) From: Michael Chan To: davem@davemloft.net Cc: netdev@vger.kernel.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, gospo@broadcom.com Subject: [PATCH net-next 00/13] bnxt_en: TX path improvements Date: Fri, 27 Oct 2023 16:22:39 -0700 Message-Id: <20231027232252.36111-1-michael.chan@broadcom.com> X-Mailer: git-send-email 2.32.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org All patches in this patchset are related to improving the TX path. There are 2 areas of improvements: 1. The TX interrupt logic currently counts the number of TX completions to determine the number of TX SKBs to free. We now change it so that the TX completion will now contain the hardware consumer index information. The driver will keep track of the latest hardware consumer index from the last TX completion and clean up all TX SKBs up to that index. This scheme aligns better with future chips and allows xmit_more code path to be more optimized. 2. The current driver logic requires an additional MSIX for each additional MQPRIO TX ring. This scheme uses too many MSIX vectors if the user enables a large number of MQPRIO TCs. We now use a new scheme that will use the same MSIX for all the MQPRIO TX rings for each ethtool channel. Each ethtool TX channel can have up to 8 MQPRIO TX rings and now they all will share the same MSIX. Michael Chan (13): bnxt_en: Put the TX producer information in the TX BD opaque field bnxt_en: Add completion ring pointer in TX and RX ring structures bnxt_en: Restructure cp_ring_arr in struct bnxt_cp_ring_info bnxt_en: Add completion ring pointer in TX and RX ring structures bnxt_en: Remove BNXT_RX_HDL and BNXT_TX_HDL bnxt_en: Refactor bnxt_tx_int() bnxt_en: New encoding for the TX opaque field bnxt_en: Refactor bnxt_hwrm_set_coal() bnxt_en: Support up to 8 TX rings per MSIX bnxt_en: Add helper to get the number of CP rings required for TX rings bnxt_en: Add macros related to TC and TX rings bnxt_en: Use existing MSIX vectors for all mqprio TX rings bnxt_en: Optimize xmit_more TX path drivers/net/ethernet/broadcom/bnxt/bnxt.c | 513 +++++++++++------- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 59 +- .../net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 11 +- drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c | 23 +- 4 files changed, 385 insertions(+), 221 deletions(-)