From patchwork Mon Nov 20 23:43:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Chan X-Patchwork-Id: 13462277 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="HKXU+bjk" Received: from mail-qt1-x830.google.com (mail-qt1-x830.google.com [IPv6:2607:f8b0:4864:20::830]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 913C995 for ; Mon, 20 Nov 2023 15:44:36 -0800 (PST) Received: by mail-qt1-x830.google.com with SMTP id d75a77b69052e-41e3e77e675so29958401cf.1 for ; Mon, 20 Nov 2023 15:44:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1700523875; x=1701128675; darn=vger.kernel.org; h=mime-version:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to; bh=EYoz/+wnToH56lfSR7Byrlt9hWuIDzUd0t+kVUoaWcg=; b=HKXU+bjkAoFv7PSIxjbUpkcS/jTwYtyNRcyDh4y62ovE/90O2JT17wU+JqOrEiplQq uOMqdeqBWdc6lItdADfGzCaiNSHvukBwMBl4DaCoYuu7fcBIp2lmkI1riktFWKOAA0lR ENfWdLmpOXTn8rqLzaMhJ7FRqrYZH49jH5hh8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700523875; x=1701128675; h=mime-version:message-id:date:subject:cc:to:from:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=EYoz/+wnToH56lfSR7Byrlt9hWuIDzUd0t+kVUoaWcg=; b=n5JMhnSevdrLbHA4xRkNMsnCcnPHJxvsE8YuNjg0ei4ADYJ9HkH1Cr6tExJvwWT4si VnlDiG9QpNzm9qLSi3jys5NkOQb3UaHriDUKG3MUy2VV0zH+Vabg/t3otYzn5lqQnvTd nwtZrfVHkdDScQkZU+Kx2E7TBXvCK+xn27tgPfeCJhhofzf+W2G/yJVCL3INi+tJs98p c78GcaVLaEKZYOY/D228zIsQpFYz3QMZHrmgAp51HKkCYAscs5HeRskoHBzFG9zARL3I q1pUrAX5b+B1cx8QPmUJE4BH9v5JN9RX+beDuhAsNUauwK12cXo7PK2hQmXXlJ30ykJj hhRw== X-Gm-Message-State: AOJu0YztCE67YGX/lH8sPz+xx/KF2RK+0+UKkuUUDuGZNqBVsqdt0lVw mJy6GoBZ5zk8pdjq6eUsoADPUw== X-Google-Smtp-Source: AGHT+IFcCUbrYoc7Akf6QHzuX0myBbcemN0qgM8QOcgXtbDuSe7XX3X+QnqtLC4j0fA8Q1CMzvHKTw== X-Received: by 2002:a05:622a:587:b0:41b:7774:96bc with SMTP id c7-20020a05622a058700b0041b777496bcmr12264133qtb.10.1700523875537; Mon, 20 Nov 2023 15:44:35 -0800 (PST) Received: from lvnvda5233.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id i9-20020ac871c9000000b0041803dfb240sm3053384qtp.45.2023.11.20.15.44.34 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Nov 2023 15:44:35 -0800 (PST) From: Michael Chan To: davem@davemloft.net Cc: netdev@vger.kernel.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, gospo@broadcom.com Subject: [PATCH net-next 00/13] bnxt_en: Prepare to support new P7 chips Date: Mon, 20 Nov 2023 15:43:52 -0800 Message-Id: <20231120234405.194542-1-michael.chan@broadcom.com> X-Mailer: git-send-email 2.32.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org This patchset is to prepare the driver to support the new P7 chips by refactoring and modifying the code. The P7 chip is built on the P5 chip and many code paths can be modified to support both chips. The whole patchset to have basic support for P7 chips is about 20 patches so a follow-on patchset will complete the support and add the new PCI IDs. The first 8 patches are changes to the backing store logic to support both chips with mostly common code paths and datastructures. Both chips require host backing store memory but the relevant firmware APIs have been modified to make it easier to support new backing store memory types. The next 4 patches are changes to TX and RX ring indexing logic and NAPI logic. The main changes are to increment the TX and RX producers unbounded and to do any masking only when needed. These changes are needed to support the P7 chips which require additional higher bits in these producer indices. The NAPI logic is also slightly modifed. The last patch is a rename of BNXT_FLAG_CHIP_P5 to BNXT_FLAG_P5_PLUS and other related macro changes to make it clear that the P5_PLUS macro applies to P5 and newer chips. Michael Chan (12): bnxt_en: The caller of bnxt_alloc_ctx_mem() should always free bp->ctx bnxt_en: Free bp->ctx inside bnxt_free_ctx_mem() bnxt_en: Restructure context memory data structures bnxt_en: Add page info to struct bnxt_ctx_mem_type bnxt_en: Use the pg_info field in bnxt_ctx_mem_type struct bnxt_en: Add bnxt_setup_ctxm_pg_tbls() helper function bnxt_en: Add support for new backing store query firmware API bnxt_en: Add support for HWRM_FUNC_BACKING_STORE_CFG_V2 firmware calls bnxt_en: Add db_ring_mask and related macro to bnxt_db_info struct. bnxt_en: Modify TX ring indexing logic. bnxt_en: Modify RX ring indexing logic. bnxt_en: Modify the NAPI logic for the new P7 chips Randy Schacher (1): bnxt_en: Rename some macros for the P5 chips drivers/net/ethernet/broadcom/bnxt/bnxt.c | 921 +++++++++++------- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 161 +-- .../net/ethernet/broadcom/bnxt/bnxt_devlink.c | 10 +- .../net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 6 +- drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c | 4 +- .../net/ethernet/broadcom/bnxt/bnxt_sriov.c | 8 +- drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c | 2 +- drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c | 14 +- 8 files changed, 677 insertions(+), 449 deletions(-)