mbox series

[net-next,v2,0/6] add ethernet driver for Tehuti Networks TN40xx chips

Message ID 20240425010354.32605-1-fujita.tomonori@gmail.com (mailing list archive)
Headers show
Series add ethernet driver for Tehuti Networks TN40xx chips | expand

Message

FUJITA Tomonori April 25, 2024, 1:03 a.m. UTC
This patchset adds a new 10G ethernet driver for Tehuti Networks
TN40xx chips. Note in mainline, there is a driver for Tehuti Networks
(drivers/net/ethernet/tehuti/tehuti.[hc]), which supports TN30xx
chips.

Multiple vendors (DLink, Asus, Edimax, QNAP, etc) developed adapters
based on TN40xx chips. Tehuti Networks went out of business but the
drivers are still distributed under GPL2 with some of the hardware
(and also available on some sites). With some changes, I try to
upstream this driver with a new PHY driver in Rust.

The major change is replacing a PHY abstraction layer with
PHYLIB. TN40xx chips are used with various PHY hardware (AMCC QT2025,
TI TLK10232, Aqrate AQR105, and Marvell MV88X3120, MV88X3310, and
MV88E2010). So the original driver has the own PHY abstraction layer
to handle them.

I've also been working on a new PHY driver for QT2025 in Rust [1]. For
now, I enable only adapters using QT2025 PHY in the PCI ID table of
this driver. I've tested this driver and the QT2025 PHY driver with
Edimax EN-9320 10G adapter. In mainline, there are PHY drivers for
AQR105 and Marvell PHYs, which could work for some TN40xx adapters
with this driver.

The other changes are replacing the embedded firmware in a header file
with the firmware APIs, handling dma mapping errors, removing many
ifdef, fixing lots of style issues, etc.

To make reviewing easier, this patchset has only basic functions. Once
merged, I'll submit features like ethtool support.

v2:
- split mdio patch into mdio and phy support
- add phylink support
- clean up mdio read/write
- use the standard bit operation macros
- use upper_32/lower_32_bits macro
- use tn40_ prefix instead of bdx_
- fix Sparse errors
- fix compiler warnings
- fix style issues
v1: https://lore.kernel.org/netdev/20240415104352.4685-1-fujita.tomonori@gmail.com/

[1] https://lore.kernel.org/netdev/20240415104701.4772-1-fujita.tomonori@gmail.com/

FUJITA Tomonori (6):
  net: tn40xx: add pci driver for Tehuti Networks TN40xx chips
  net: tn40xx: add register defines
  net: tn40xx: add basic Tx handling
  net: tn40xx: add basic Rx handling
  net: tn40xx: add mdio bus support
  net: tn40xx: add PHYLIB support

 MAINTAINERS                             |    8 +-
 drivers/net/ethernet/tehuti/Kconfig     |   15 +
 drivers/net/ethernet/tehuti/Makefile    |    3 +
 drivers/net/ethernet/tehuti/tn40.c      | 1863 +++++++++++++++++++++++
 drivers/net/ethernet/tehuti/tn40.h      |  276 ++++
 drivers/net/ethernet/tehuti/tn40_mdio.c |  129 ++
 drivers/net/ethernet/tehuti/tn40_phy.c  |   61 +
 drivers/net/ethernet/tehuti/tn40_regs.h |  266 ++++
 8 files changed, 2620 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/ethernet/tehuti/tn40.c
 create mode 100644 drivers/net/ethernet/tehuti/tn40.h
 create mode 100644 drivers/net/ethernet/tehuti/tn40_mdio.c
 create mode 100644 drivers/net/ethernet/tehuti/tn40_phy.c
 create mode 100644 drivers/net/ethernet/tehuti/tn40_regs.h


base-commit: dd99c29e83e48acf80ee1855a5a6991b3e6523f5

Comments

Jiri Pirko April 25, 2024, 11:32 a.m. UTC | #1
Thu, Apr 25, 2024 at 03:03:48AM CEST, fujita.tomonori@gmail.com wrote:
>This patchset adds a new 10G ethernet driver for Tehuti Networks
>TN40xx chips. Note in mainline, there is a driver for Tehuti Networks
>(drivers/net/ethernet/tehuti/tehuti.[hc]), which supports TN30xx
>chips.
>
>Multiple vendors (DLink, Asus, Edimax, QNAP, etc) developed adapters
>based on TN40xx chips. Tehuti Networks went out of business but the
>drivers are still distributed under GPL2 with some of the hardware
>(and also available on some sites). With some changes, I try to
>upstream this driver with a new PHY driver in Rust.
>
>The major change is replacing a PHY abstraction layer with
>PHYLIB. TN40xx chips are used with various PHY hardware (AMCC QT2025,
>TI TLK10232, Aqrate AQR105, and Marvell MV88X3120, MV88X3310, and
>MV88E2010). So the original driver has the own PHY abstraction layer
>to handle them.
>
>I've also been working on a new PHY driver for QT2025 in Rust [1]. For
>now, I enable only adapters using QT2025 PHY in the PCI ID table of
>this driver. I've tested this driver and the QT2025 PHY driver with
>Edimax EN-9320 10G adapter. In mainline, there are PHY drivers for
>AQR105 and Marvell PHYs, which could work for some TN40xx adapters
>with this driver.
>
>The other changes are replacing the embedded firmware in a header file
>with the firmware APIs, handling dma mapping errors, removing many
>ifdef, fixing lots of style issues, etc.
>
>To make reviewing easier, this patchset has only basic functions. Once
>merged, I'll submit features like ethtool support.
>
>v2:
>- split mdio patch into mdio and phy support
>- add phylink support
>- clean up mdio read/write
>- use the standard bit operation macros
>- use upper_32/lower_32_bits macro
>- use tn40_ prefix instead of bdx_
>- fix Sparse errors
>- fix compiler warnings
>- fix style issues
>v1: https://lore.kernel.org/netdev/20240415104352.4685-1-fujita.tomonori@gmail.com/
>
>[1] https://lore.kernel.org/netdev/20240415104701.4772-1-fujita.tomonori@gmail.com/
>
>FUJITA Tomonori (6):
>  net: tn40xx: add pci driver for Tehuti Networks TN40xx chips
>  net: tn40xx: add register defines
>  net: tn40xx: add basic Tx handling
>  net: tn40xx: add basic Rx handling
>  net: tn40xx: add mdio bus support
>  net: tn40xx: add PHYLIB support

In all patches, could you please maintain prefixes tn40_/TN40_ for all
function, struct and define names?
FUJITA Tomonori April 25, 2024, 1:40 p.m. UTC | #2
Hi,

On Thu, 25 Apr 2024 13:32:50 +0200
Jiri Pirko <jiri@resnulli.us> wrote:

>>FUJITA Tomonori (6):
>>  net: tn40xx: add pci driver for Tehuti Networks TN40xx chips
>>  net: tn40xx: add register defines
>>  net: tn40xx: add basic Tx handling
>>  net: tn40xx: add basic Rx handling
>>  net: tn40xx: add mdio bus support
>>  net: tn40xx: add PHYLIB support
> 
> In all patches, could you please maintain prefixes tn40_/TN40_ for all
> function, struct and define names?

Got it. I'll do in v3.

thanks,