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(p5261226-ipxg23801hodogaya.kanagawa.ocn.ne.jp. [180.15.241.226]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c1c27e293csm5448263a91.28.2024.06.02.23.52.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 23:52:46 -0700 (PDT) From: FUJITA Tomonori To: netdev@vger.kernel.org Cc: andrew@lunn.ch, horms@kernel.org, kuba@kernel.org, jiri@resnulli.us, pabeni@redhat.com, linux@armlinux.org.uk, hfdevel@gmx.net, naveenm@marvell.com, jdamato@fastly.com Subject: [PATCH net-next v8 0/6] add ethernet driver for Tehuti Networks TN40xx chips Date: Mon, 3 Jun 2024 15:49:49 +0900 Message-Id: <20240603064955.58327-1-fujita.tomonori@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org This patchset adds a new 10G ethernet driver for Tehuti Networks TN40xx chips. Note in mainline, there is a driver for Tehuti Networks (drivers/net/ethernet/tehuti/tehuti.[hc]), which supports TN30xx chips. Multiple vendors (DLink, Asus, Edimax, QNAP, etc) developed adapters based on TN40xx chips. Tehuti Networks went out of business but the drivers are still distributed under GPL2 with some of the hardware (and also available on some sites). With some changes, I try to upstream this driver with a new PHY driver in Rust. The major change is replacing the PHY abstraction layer in the original driver with phylink. TN40xx chips are used with various PHY hardware (AMCC QT2025, TI TLK10232, Aqrate AQR105, and Marvell MV88X3120, MV88X3310, and MV88E2010). I've also been working on a new PHY driver for QT2025 in Rust [1]. For now, I enable only adapters using QT2025 PHY in the PCI ID table of this driver. I've tested this driver and the QT2025 PHY driver with Edimax EN-9320 10G adapter and 10G-SR SFP+. In mainline, there are PHY drivers for AQR105 and Marvell PHYs, which could work for some TN40xx adapters with this driver. To make reviewing easier, this patchset has only basic functions. Once merged, I'll submit features like ethtool support. v8: - remove phylink_mac_change() call - fix phylink_start() usage (call it after the driver is ready to operate). - simplify the way to get the private struct from phylink_config pointer - fix netif_stop_queue usage in mac_link_down callback - remove MLO_AN_PHY usage v7: https://lore.kernel.org/netdev/20240527203928.38206-7-fujita.tomonori@gmail.com/ - use page pool API for rx allocation - fix NAPI API misuse - fix error checking of mdio write v6: https://lore.kernel.org/netdev/20240512085611.79747-2-fujita.tomonori@gmail.com/ - use the firmware for TN30xx chips - move link up/down code to phylink's mac_link_up/mac_link_down callbacks - clean up mdio access code v5: https://lore.kernel.org/netdev/20240508113947.68530-1-fujita.tomonori@gmail.com/ - remove dma_set_mask_and_coherent fallback - count tx_dropped - use ndo_get_stats64 instead of ndo_get_stats - remove unnecessary __packed attribute - fix NAPI API usage - rename tn40_recycle_skb to tn40_recycle_rx_buffer - avoid high order page allocation (the maximum is order-1 now) v4: https://lore.kernel.org/netdev/20240501230552.53185-1-fujita.tomonori@gmail.com/ - fix warning on 32bit build - fix inline warnings - fix header file inclusion - fix TN40_NDEV_TXQ_LEN - remove 'select PHYLIB' in Kconfig - fix access to phydev - clean up readx_poll_timeout_atomic usage v3: https://lore.kernel.org/netdev/20240429043827.44407-1-fujita.tomonori@gmail.com/ - remove driver version - use prefixes tn40_/TN40_ for all function, struct and define names v2: https://lore.kernel.org/netdev/20240425010354.32605-1-fujita.tomonori@gmail.com/ - split mdio patch into mdio and phy support - add phylink support - clean up mdio read/write - use the standard bit operation macros - use upper_32/lower_32_bits macro - use tn40_ prefix instead of bdx_ - fix Sparse errors - fix compiler warnings - fix style issues v1: https://lore.kernel.org/netdev/20240415104352.4685-1-fujita.tomonori@gmail.com/ [1] https://lore.kernel.org/netdev/20240415104701.4772-1-fujita.tomonori@gmail.com/ FUJITA Tomonori (6): net: tn40xx: add pci driver for Tehuti Networks TN40xx chips net: tn40xx: add register defines net: tn40xx: add basic Tx handling net: tn40xx: add basic Rx handling net: tn40xx: add mdio bus support net: tn40xx: add phylink support MAINTAINERS | 8 +- drivers/net/ethernet/tehuti/Kconfig | 15 + drivers/net/ethernet/tehuti/Makefile | 3 + drivers/net/ethernet/tehuti/tn40.c | 1771 +++++++++++++++++++++++ drivers/net/ethernet/tehuti/tn40.h | 233 +++ drivers/net/ethernet/tehuti/tn40_mdio.c | 143 ++ drivers/net/ethernet/tehuti/tn40_phy.c | 76 + drivers/net/ethernet/tehuti/tn40_regs.h | 245 ++++ 8 files changed, 2493 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/tehuti/tn40.c create mode 100644 drivers/net/ethernet/tehuti/tn40.h create mode 100644 drivers/net/ethernet/tehuti/tn40_mdio.c create mode 100644 drivers/net/ethernet/tehuti/tn40_phy.c create mode 100644 drivers/net/ethernet/tehuti/tn40_regs.h base-commit: b5c089880723b2c18531c40e445235bd646a51d1