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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN3PEPF0000B074.mail.protection.outlook.com (10.167.243.119) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7762.17 via Frontend Transport; Mon, 8 Jul 2024 05:56:20 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 7 Jul 2024 22:56:09 -0700 Received: from nps-server-23.mtl.labs.mlnx (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 7 Jul 2024 22:56:05 -0700 From: Shay Drory To: , , , , , , CC: , , , , , Shay Drory Subject: [PATCH net-next v10 0/2] Introduce auxiliary bus IRQs sysfs Date: Mon, 8 Jul 2024 08:55:35 +0300 Message-ID: <20240708055537.1014744-1-shayd@nvidia.com> X-Mailer: git-send-email 2.38.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B074:EE_|PH7PR12MB9103:EE_ X-MS-Office365-Filtering-Correlation-Id: 5d07521a-2bb0-4e28-f58b-08dc9f12b12c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|7416014|376014|36860700013; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jul 2024 05:56:20.8634 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5d07521a-2bb0-4e28-f58b-08dc9f12b12c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B074.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9103 X-Patchwork-Delegate: kuba@kernel.org Today, PCI PFs and VFs, which are anchored on the PCI bus, display their IRQ information in the /msi_irqs/ sysfs files. PCI subfunctions (SFs) are similar to PFs and VFs and these SFs are anchored on the auxiliary bus. However, these PCI SFs lack such IRQ information on the auxiliary bus, leaving users without visibility into which IRQs are used by the SFs. This absence makes it impossible to debug situations and to understand the source of interrupts/SFs for performance tuning and debug. Additionally, the SFs are multifunctional devices supporting RDMA, network devices, clocks, and more, similar to their peer PCI PFs and VFs. Therefore, it is desirable to have SFs' IRQ information available at the bus/device level. To overcome the above limitations, this short series extends the auxiliary bus to display IRQ information in sysfs, similar to that of PFs and VFs. It adds an 'irqs' directory under the auxiliary device and includes an sysfs file within it. For example: $ ls /sys/bus/auxiliary/devices/mlx5_core.sf.1/irqs/ 50 51 52 53 54 55 56 57 58 Patch summary: ============== patch-1 adds auxiliary bus to support irqs used by auxiliary device patch-2 mlx5 driver using exposing irqs for PCI SF devices via auxiliary bus Reviewed-by: Przemek Kitszel --- v9-v10: - remove Przemek RB - add name field to auxiliary_irq_info (Greg and Przemek) - handle bogus IRQ in auxiliary_device_sysfs_irq_remove (Greg) v8-v9: - add Przemek RB - use guard() in auxiliary_irq_dir_prepare (Paolo) v7-v8: - use cleanup.h for info and name fields (Greg) - correct error flow in auxiliary_irq_dir_prepare (Przemek) - add documentation for new fields of auxiliary_device (Simon) v6->v7: - dynamically creating irqs directory when first irq file created, patch #1 (Greg). - removed irqs flag and simplified the dev_add() API, patch #1 (Greg). - move sysfs related new code to a new auxiliary_sysfs.c file, patch #1 (Greg). v5->v6: - fix error flow in patch #2 (Przemek and Parav). - remove concept of shared and exclusive and hence global xarray in patch #1 (Greg). v4->v5: - addressed comments from Greg in patch #1. v3->4: - addressed comments from Przemek in patch #1. v2->v3: - addressed comments from Parav and Przemek in patch #1. - fixed a bug in patch #2. v1->v2: - addressed comments from Greg, Simon H and kernel test boot in patch #1. Shay Drory (2): driver core: auxiliary bus: show auxiliary device IRQs net/mlx5: Expose SFs IRQs Documentation/ABI/testing/sysfs-bus-auxiliary | 9 ++ drivers/base/Makefile | 1 + drivers/base/auxiliary.c | 1 + drivers/base/auxiliary_sysfs.c | 113 ++++++++++++++++++ drivers/net/ethernet/mellanox/mlx5/core/eq.c | 6 +- .../mellanox/mlx5/core/irq_affinity.c | 18 ++- .../ethernet/mellanox/mlx5/core/mlx5_core.h | 6 + .../ethernet/mellanox/mlx5/core/mlx5_irq.h | 12 +- .../net/ethernet/mellanox/mlx5/core/pci_irq.c | 12 +- include/linux/auxiliary_bus.h | 22 ++++ 10 files changed, 189 insertions(+), 11 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-auxiliary create mode 100644 drivers/base/auxiliary_sysfs.c