| Message ID | 20241010130646.399365-1-jiri@resnulli.us (mailing list archive) |
|---|---|
| Headers | show |
| Series | dpll: expose clock quality level | expand |
Note that there is still discussion going on in v1. Will let you know how that ends-up, if v2 is okay or another v will come up. Thanks! Thu, Oct 10, 2024 at 03:06:44PM CEST, jiri@resnulli.us wrote: >From: Jiri Pirko <jiri@nvidia.com> > >Some device driver might know the quality of the clock it is running. >In order to expose the information to the user, introduce new netlink >attribute and dpll device op. Implement the op in mlx5 driver. > >Example: >$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml --dump device-get >[{'clock-id': 540663412652420550, > 'clock-quality-level': 'itu-eeec', <<<<<<<<<<<<<<<<<<<<<<<<<< > 'id': 0, > 'lock-status': 'unlocked', > 'lock-status-error': 'none', > 'mode': 'manual', > 'mode-supported': ['manual'], > 'module-name': 'mlx5_dpll', > 'type': 'eec'}] > >--- >v1->v2: >- extended quality enum documentation >- added "itu" prefix to the enum values > >Jiri Pirko (2): > dpll: add clock quality level attribute and op > net/mlx5: DPLL, Add clock quality level op implementation > > Documentation/netlink/specs/dpll.yaml | 32 ++++++++ > drivers/dpll/dpll_netlink.c | 22 +++++ > .../net/ethernet/mellanox/mlx5/core/dpll.c | 82 +++++++++++++++++++ > include/linux/dpll.h | 4 + > include/uapi/linux/dpll.h | 23 ++++++ > 5 files changed, 163 insertions(+) > >-- >2.46.1 >
From: Jiri Pirko <jiri@nvidia.com> Some device driver might know the quality of the clock it is running. In order to expose the information to the user, introduce new netlink attribute and dpll device op. Implement the op in mlx5 driver. Example: $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml --dump device-get [{'clock-id': 540663412652420550, 'clock-quality-level': 'itu-eeec', <<<<<<<<<<<<<<<<<<<<<<<<<< 'id': 0, 'lock-status': 'unlocked', 'lock-status-error': 'none', 'mode': 'manual', 'mode-supported': ['manual'], 'module-name': 'mlx5_dpll', 'type': 'eec'}] --- v1->v2: - extended quality enum documentation - added "itu" prefix to the enum values Jiri Pirko (2): dpll: add clock quality level attribute and op net/mlx5: DPLL, Add clock quality level op implementation Documentation/netlink/specs/dpll.yaml | 32 ++++++++ drivers/dpll/dpll_netlink.c | 22 +++++ .../net/ethernet/mellanox/mlx5/core/dpll.c | 82 +++++++++++++++++++ include/linux/dpll.h | 4 + include/uapi/linux/dpll.h | 23 ++++++ 5 files changed, 163 insertions(+)