From patchwork Tue Mar 4 10:53:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 14000431 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E702A273FE for ; Tue, 4 Mar 2025 10:53:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741085613; cv=none; b=cHr8Y/zK3I2/uLZPkwZQUauHR1kI52T64/hoaxfmn52KChkJRJabHrxshOILiA6KyClyVJWdUD4nHIzHvAKiZQ4Nrb9ogZBwLrQzdWOgwivZB4MxOqcEbH3jy+ciWCCqRtzW6ENVTjsoFPhVDzYfAkchRK5VUPkPCNI3DG5I7Vw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741085613; c=relaxed/simple; bh=PJe7JR1SMfsuFtvUn4Mui1JqI80DvxOWYIqdQiOdCXU=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=fFn5B0/WMsLYKD/ThhWsGbxlG/B32AvfIuOoPg2gXL0shIv8ithXoqvMV+MxZHN+6kfCoky3PMbOj9aIEcf58lTM64qTtuneMT2Yh8S0AIxq4QSQvDHVmyz+AdDoV0RN8TVb7EvceCjPBku8dZq8PMGrcjxIMAMB8db3O5P88ZA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=qCIG+mvd; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="qCIG+mvd" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Sender:Content-Type:MIME-Version: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=2HcV5lQ7x+LEiGJklba2pLXleYozVURaZeAXXeJEOQ4=; b=qCIG+mvdWJAgyvByTMC/wU6eAn utt46qOaRF/vgmX9D7Z9COGpU4nZrZB8H5rQCXo331GBzKtBu8IwAvT+EqLbkTxpg1J0SSw7J2JSp J4TNrIshIYA7sMUG+E8EQ/fK86xSkEHLP/2cgr4HBBi1p+7ZHrbg98Rae7arroAI12mwZmzNnKWmL vNwxq/Dpy1WIdPG5ASL6uavEvgDtjGzk5pXECfS6w8rzjtwimKCWj1eif8QtesFBxBKjLSSEkvE8p pQYDbGyuyaysH3Wj25s3OoRywiDCLgJiL4M3rTR/ITKg6y3nS2qHEedvCPs2NeppKGwIj8VovVVD7 pmc75hUg==; Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:43106) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tpPto-0002UN-29; Tue, 04 Mar 2025 10:53:20 +0000 Received: from linux by shell.armlinux.org.uk with local (Exim 4.96) (envelope-from ) id 1tpPtl-0004jJ-1G; Tue, 04 Mar 2025 10:53:17 +0000 Date: Tue, 4 Mar 2025 10:53:17 +0000 From: "Russell King (Oracle)" To: Jon Hunter , Thierry Reding , "Lad, Prabhakar" Cc: Alexandre Torgue , Andrew Lunn , Andrew Lunn , "David S. Miller" , Eric Dumazet , Heiner Kallweit , Jakub Kicinski , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Coquelin , netdev@vger.kernel.org, Paolo Abeni Subject: [PATCH RFC net-next 0/3] net: stmmac: approach 2 to solve EEE LPI reset issues Message-ID: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Sender: Russell King (Oracle) X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Hi, This is a second approach to solving the STMMAC reset issues caused by the lack of receive clock from the PHY where the media is in low power mode with a PHY that supports receive clock-stop. The first approach centred around only addressing the issue in the resume path, but it seems to also happen when the platform glue module is removed and re-inserted (Jon - can you check whether that's also the case for you please?) As this is more targetted, I've dropped the patches from this series which move the call to phylink_resume(), so the link may still come up too early on resume - but that's something I also intend to fix. This is experimental - so I value test reports for this change. As mentioned recently, the reset timeout will only occur if the PHY receive clock is actually stopped at the moment that stmmac_reset() is called and remains stopped for the duration of the timeout. Network activity can wake up the link, causing the PHY to restart its receive clock and allow reset to complete. So, careful testing with and without these patches is necessary. drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ++ drivers/net/phy/phylink.c | 54 ++++++++++++++++++++++- include/linux/phylink.h | 3 ++ 3 files changed, 59 insertions(+), 1 deletion(-)