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Miller" , Jakub Kicinski , Andrew Lunn , Adrian Pop , "Michal Kubecek" , Don Bollinger , CC: Vladyslav Tarasiuk , Moshe Shemesh Subject: [RFC PATCH V3 net-next 4/5] net/mlx5: Add support for DSFP module EEPROM dumps Date: Mon, 15 Mar 2021 19:12:42 +0200 Message-ID: <1615828363-464-5-git-send-email-moshe@nvidia.com> X-Mailer: git-send-email 1.8.4.3 In-Reply-To: <1615828363-464-1-git-send-email-moshe@nvidia.com> References: <1615828363-464-1-git-send-email-moshe@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 077aefb2-96c3-4c3b-94e9-08d8e7d59a2e X-MS-TrafficTypeDiagnostic: BN6PR12MB1796: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1201; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jFe5mzlnfQxcG3/liLtThvABT3IZdDtsNxwnVbMl6mY9wNeD5E3iL/iY+rbgfuYpU77UWa5r1TGpPtEI0c1sUIbVMrl5h9sapNOKmGVy2IFXbJ3CyWFoe7k140HE+KkSwmsEHRKZ4fm5unPgkQPXDiHevAfUdlUbQ16G0TUtkXpeia8wfQ80tXAnRHPtz+CjcK0cX1Z3EzjLLCA8kpt9+l0quoYgKybTUb2Wq0wLGbh/paCZ6S9thgq4RUB734vf0gfRg1b4OqsogO9gZX4scq66ZfPzglPkTvSyUw+cCVby1Qtd7ANnV9lQ0tSVeUcszUbJAWKGUYzyb0tK96deK946GbMiOD/uomQQ9llKReKUgCFBzf+7aZFX/LruJpcvuAUjOHFgSCfgNbnO9mPfFe/jmEYCgl0VeId1O8m6ryHCsUubgFDhtTHzqz68Niz6HYMpod5G9HOJqsLYOlUC246DDwsw+8j84dIWf7MfhqRxa6joO05zgGxEdu9WZKzvlSI4W6fhX9scOqPQF8HpGJgAcgz7j/s/0irkzhD6SZunRNNsXOZc6IO7iGMiPWxzoP1ecT02nyKoOPgSYkJwMsfoQidYubr+xCxBcwZm4ocStuRwYT7recHYjsuy2eG9qA0nOSUko3ABai1QMJyRXxTbUrxQ1D6NNiuYv2HKLhgJYi1Xddfp8I0uW4ehLO/1 X-Forefront-Antispam-Report: CIP:216.228.112.35;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid04.nvidia.com;CAT:NONE;SFS:(4636009)(39860400002)(396003)(136003)(376002)(346002)(36840700001)(46966006)(34020700004)(107886003)(86362001)(83380400001)(8936002)(478600001)(356005)(36756003)(7636003)(2906002)(26005)(70586007)(5660300002)(110136005)(70206006)(316002)(36906005)(82740400003)(4326008)(8676002)(82310400003)(54906003)(426003)(6666004)(7696005)(186003)(336012)(36860700001)(2616005)(47076005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Mar 2021 17:13:07.2240 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 077aefb2-96c3-4c3b-94e9-08d8e7d59a2e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.35];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1796 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From: Vladyslav Tarasiuk Allow the driver to recognise DSFP transceiver module ID and therefore allow its EEPROM dumps using ethtool. Signed-off-by: Vladyslav Tarasiuk --- drivers/net/ethernet/mellanox/mlx5/core/port.c | 3 ++- include/linux/mlx5/port.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/port.c b/drivers/net/ethernet/mellanox/mlx5/core/port.c index f7a16fdfb8d3..3a7aa6b05198 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/port.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/port.c @@ -446,7 +446,8 @@ int mlx5_query_module_eeprom_data(struct mlx5_core_dev *dev, if (module_id != MLX5_MODULE_ID_SFP && module_id != MLX5_MODULE_ID_QSFP && module_id != MLX5_MODULE_ID_QSFP28 && - module_id != MLX5_MODULE_ID_QSFP_PLUS) { + module_id != MLX5_MODULE_ID_QSFP_PLUS && + module_id != MLX5_MODULE_ID_DSFP) { mlx5_core_err(dev, "Module ID not recognized: 0x%x\n", module_id); return -EINVAL; } diff --git a/include/linux/mlx5/port.h b/include/linux/mlx5/port.h index 887cd43b41e8..71b4373cb96c 100644 --- a/include/linux/mlx5/port.h +++ b/include/linux/mlx5/port.h @@ -45,6 +45,7 @@ enum mlx5_module_id { MLX5_MODULE_ID_QSFP = 0xC, MLX5_MODULE_ID_QSFP_PLUS = 0xD, MLX5_MODULE_ID_QSFP28 = 0x11, + MLX5_MODULE_ID_DSFP = 0x1B, }; enum mlx5_an_status {