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Wed, 14 Sep 2022 05:33:57 -0700 Envelope-to: git@amd.com, radhey.shyam.pandey@amd.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, gregkh@linuxfoundation.org, linux-arm-kernel@lists.infradead.org, andrew@lunn.ch, claudiu.beznea@microchip.com, conor.dooley@microchip.com, nicolas.ferre@microchip.com, pabeni@redhat.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Received: from [172.23.64.3] (port=50640 helo=xhdvnc103.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1oYRaX-0001IL-5g; Wed, 14 Sep 2022 05:33:57 -0700 Received: by xhdvnc103.xilinx.com (Postfix, from userid 13245) id 1A5141054CA; Wed, 14 Sep 2022 18:03:30 +0530 (IST) From: Radhey Shyam Pandey To: , , , , , , , , , CC: , , , , Radhey Shyam Pandey Subject: [PATCH v3 net-next 2/2] net: macb: Add zynqmp SGMII dynamic configuration support Date: Wed, 14 Sep 2022 18:03:16 +0530 Message-ID: <1663158796-14869-3-git-send-email-radhey.shyam.pandey@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1663158796-14869-1-git-send-email-radhey.shyam.pandey@amd.com> References: <1663158796-14869-1-git-send-email-radhey.shyam.pandey@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM3NAM02FT026:EE_|SA2PR02MB7850:EE_ X-MS-Office365-Filtering-Correlation-Id: 4c5a4990-9789-4c71-cb5c-08da964d7b37 X-MS-Exchange-SenderADCheck: 0 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Sep 2022 12:34:34.9311 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4c5a4990-9789-4c71-cb5c-08da964d7b37 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: DM3NAM02FT026.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR02MB7850 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add support for the dynamic configuration which takes care of configuring the GEM secure space configuration registers using EEMI APIs. High level sequence is to: - Check for the PM dynamic configuration support, if no error proceed with GEM dynamic configurations(next steps) otherwise skip the dynamic configuration. - Configure GEM Fixed configurations. - Configure GEM_CLK_CTRL (gemX_sgmii_mode). - Trigger GEM reset. Signed-off-by: Radhey Shyam Pandey Reviewed-by: Andrew Lunn Tested-by: Conor Dooley (for MPFS) Reviewed-by: Claudiu Beznea --- Changes for v3: - Introduce goto for common phy_exit return path. - Change return check to if(ret) for of_property_read_u32_array and zynqmp_pm_set_gem_config APIs. Changes for v2: - Add phy_exit() in error return paths. --- drivers/net/ethernet/cadence/macb_main.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 66c7d08d376a..4769c8a0c73a 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "macb.h" /* This structure is only used for MACB on SiFive FU540 devices */ @@ -4621,6 +4622,25 @@ static int init_reset_optional(struct platform_device *pdev) "failed to init SGMII PHY\n"); } + ret = zynqmp_pm_is_function_supported(PM_IOCTL, IOCTL_SET_GEM_CONFIG); + if (!ret) { + u32 pm_info[2]; + + ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains", + pm_info, ARRAY_SIZE(pm_info)); + if (ret) { + dev_err(&pdev->dev, "Failed to read power management information\n"); + goto err_out_phy_exit; + } + ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_FIXED, 0); + if (ret) + goto err_out_phy_exit; + + ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_SGMII_MODE, 1); + if (ret) + goto err_out_phy_exit; + } + /* Fully reset controller at hardware level if mapped in device tree */ ret = device_reset_optional(&pdev->dev); if (ret) { @@ -4629,6 +4649,8 @@ static int init_reset_optional(struct platform_device *pdev) } ret = macb_init(pdev); + +err_out_phy_exit: if (ret) phy_exit(bp->sgmii_phy);