From patchwork Thu Oct 29 22:25:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 11867723 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3506C4742C for ; Thu, 29 Oct 2020 22:25:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B4A5214F1 for ; Thu, 29 Oct 2020 22:25:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604010323; bh=C0AJ+ZLPZUyrlH7UNBZgTfeflDN7cswS0QlQC5XiO4A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Bvlt9ncS+m9BlGgxsgXaPeyTtef7clhOuGMAd4FBw8Kx3Crlvi8Zu6JvCMVJ1mCiY pjnvq1ieQLM/Z2LHEt3e1ZrDdOMlVWm+7nK9N0mdVbgdbohKb3n/csEUuftnBlGWZD CRauMNHa0G7ZgZcF9lUIM2fU9OeSnBmf7RLIDfoQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725984AbgJ2WZW (ORCPT ); Thu, 29 Oct 2020 18:25:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:43796 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725960AbgJ2WZU (ORCPT ); Thu, 29 Oct 2020 18:25:20 -0400 Received: from dellmb.labs.office.nic.cz (nat-1.nic.cz [217.31.205.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 18A02215A4; Thu, 29 Oct 2020 22:25:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604010319; bh=C0AJ+ZLPZUyrlH7UNBZgTfeflDN7cswS0QlQC5XiO4A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TDut2KoDXnikYltsbuJZ0H9rBbFj4v9wFlCJcmdId9jQzEAq45Bsjiv8QX8p2PH4f G/h1Q5b89FJSKff2GuMkIp300/FDtt8fPkPMOTXdU3LO42h4rS2dyjW3VeI9gczxYf Cwq5AVulKsSGnygN0V47g/bnyfrYMk2RgeIbuIIU= From: =?utf-8?q?Marek_Beh=C3=BAn?= To: netdev@vger.kernel.org Cc: davem@davemloft.net, =?utf-8?q?Marek_Beh=C3=BAn?= , Andrew Lunn , Russell King Subject: [PATCH net-next v2 4/5] net: phy: marvell10g: change MACTYPE if underlying MAC does not support it Date: Thu, 29 Oct 2020 23:25:08 +0100 Message-Id: <20201029222509.27201-5-kabel@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201029222509.27201-1-kabel@kernel.org> References: <20201029222509.27201-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org RollBall SFPs contain a Marvell 88X3310 PHY, but by default the MACTYPE is set to 10GBASE-R with Rate Matching. Some devices (for example those based on Armada 38x) only support up to 2500base-x SerDes modes. Change the PHY's MACTYPE to 4 (which means changing between 10gbase-r, 5gbase-r, 2500base-x ans SGMII depending on copper speed) if this is the case (which is infered from phydev->interface). Signed-off-by: Marek Behún Cc: Andrew Lunn Cc: Russell King --- drivers/net/phy/marvell10g.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 1901ba277413..9e8e9aa66972 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -453,6 +453,33 @@ static bool mv3310_has_pma_ngbaset_quirk(struct phy_device *phydev) MV_PHY_ALASKA_NBT_QUIRK_MASK) == MV_PHY_ALASKA_NBT_QUIRK_REV; } +static int mv3310_select_mactype(struct phy_device *phydev) +{ + int mac_type, ret; + + /* On some devices the MAC does not support 10G mode, but may support + * lower modes, such as SGMII or 2500base-x. + * By changing MACTYPE of the PHY to 4 in this case, we ensure that + * the MAC will link with the PHY at least for these lower speeds. + */ + switch (phydev->interface) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_2500BASEX: + mac_type = 4; + break; + default: + return 0; + } + + ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, + MV_V2_PORT_MAC_TYPE_MASK, mac_type); + if (ret <= 0) + return ret; + + return phy_modify_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, + MV_V2_PORT_CTRL_SWRST, MV_V2_PORT_CTRL_SWRST); +} + static int mv3310_config_init(struct phy_device *phydev) { struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); @@ -474,6 +501,10 @@ static int mv3310_config_init(struct phy_device *phydev) if (err) return err; + err = mv3310_select_mactype(phydev); + if (err) + return err; + val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL); if (val < 0) return val;